LM3S1435 Luminary Micro, Inc, LM3S1435 Datasheet - Page 458
LM3S1435
Manufacturer Part Number
LM3S1435
Description
Lm3s1435 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1435.pdf
(521 pages)
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Signal Tables
458
Pin Number
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Pin Name
SSI0Clk
SSI0Fss
SSI0Rx
SSI0Tx
VDD25
VDD25
U1Tx
CCP3
U0Rx
U0Tx
CCP1
PD3
GND
PG3
PG2
PG1
PG0
VDD
GND
PC7
PC6
PC5
PC4
PA0
PA1
PA2
PA3
PA4
PA5
VDD
GND
PA6
GND
NC
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
I
I
Buffer Type
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
-
-
-
Description
GPIO port D bit 3
UART module 1 transmit. When in IrDA mode,
this signal has IrDA modulation.
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
GPIO port G bit 3
GPIO port G bit 2
GPIO port G bit 1
GPIO port G bit 0
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port C bit 7
GPIO port C bit 6
Capture/Compare/PWM 3
GPIO port C bit 5
GPIO port C bit 4
GPIO port A bit 0
UART module 0 receive. When in IrDA mode,
this signal has IrDA modulation.
GPIO port A bit 1
UART module 0 transmit. When in IrDA mode,
this signal has IrDA modulation.
GPIO port A bit 2
SSI module 0 clock
GPIO port A bit 3
SSI module 0 frame
GPIO port A bit 4
SSI module 0 receive
GPIO port A bit 5
SSI module 0 transmit
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port A bit 6
Capture/Compare/PWM 1
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
July 25, 2008
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