LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 5

• Manufacturer Part Number: LM3S6911
• Description: Lm3s6911 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

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10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 206
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 206
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 207
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 211
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 212
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 212
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 213
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 213
10.3.6 16-Bit PWM Mode ................................................................................................................... 214
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 264
12.2.2 Baud-Rate Generation ............................................................................................................. 265
12.2.3 Data Transmission .................................................................................................................. 265
12.2.4 Serial IR (SIR) ......................................................................................................................... 266
12.2.5 FIFO Operation ....................................................................................................................... 267
12.2.6 Interrupts ................................................................................................................................ 267
12.2.7 Loopback Operation ................................................................................................................ 268
12.2.8 IrDA SIR block ........................................................................................................................ 268
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 305
13.2.2 FIFO Operation ....................................................................................................................... 305
13.2.3 Interrupts ................................................................................................................................ 305
13.2.4 Frame Formats ....................................................................................................................... 306
13.3
13.4
13.5
14
14.1
July 26, 2008
General-Purpose Timers ................................................................................................. 204
Block Diagram ........................................................................................................................ 204
Functional Description ............................................................................................................. 205
Initialization and Configuration ................................................................................................. 211
Register Map .......................................................................................................................... 214
Register Descriptions .............................................................................................................. 215
Watchdog Timer ............................................................................................................... 240
Block Diagram ........................................................................................................................ 240
Functional Description ............................................................................................................. 240
Initialization and Configuration ................................................................................................. 241
Register Map .......................................................................................................................... 241
Register Descriptions .............................................................................................................. 242
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 263
Block Diagram ........................................................................................................................ 264
Functional Description ............................................................................................................. 264
Initialization and Configuration ................................................................................................. 268
Register Map .......................................................................................................................... 269
Register Descriptions .............................................................................................................. 270
Synchronous Serial Interface (SSI) ................................................................................ 304
Block Diagram ........................................................................................................................ 304
Functional Description ............................................................................................................. 304
Initialization and Configuration ................................................................................................. 313
Register Map .......................................................................................................................... 314
Register Descriptions .............................................................................................................. 315
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 341
2
C) Interface ............................................................................ 341
Preliminary
LM3S6911 Microcontroller
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