LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 9

no-image

LM3S6911

Manufacturer Part Number
LM3S6911
Description
Lm3s6911 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S6911
Manufacturer:
DSP
Quantity:
885
Part Number:
LM3S6911-EBZ50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S6911-EQC50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S6911-EQC50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S6911-IBZ50-A2
Manufacturer:
Semtech
Quantity:
1 669
Part Number:
LM3S6911-IBZ50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S6911-IBZ50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S6911-IQC50-A2
Manufacturer:
SIGMA
Quantity:
4 000
Part Number:
LM3S6911-IQC50-A2
Manufacturer:
TI
Quantity:
7
Part Number:
LM3S6911-IQC50-A2
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
LM3S6911-IQC50-A2
0
Company:
Part Number:
LM3S6911-IQC50-A2
Quantity:
1 100
Part Number:
LM3S6911-IQC50-A2SD
Manufacturer:
TI/德州仪器
Quantity:
20 000
Figure 14-8.
Figure 14-9.
Figure 14-10. Master Burst RECEIVE .................................................................................................. 349
Figure 14-11. Master Burst RECEIVE after Burst SEND ........................................................................ 350
Figure 14-12. Master Burst SEND after Burst RECEIVE ........................................................................ 351
Figure 14-13. Slave Command Sequence ............................................................................................ 352
Figure 15-1.
Figure 15-2.
Figure 15-3.
Figure 16-1.
Figure 16-2.
Figure 16-3.
Figure 17-1.
Figure 17-2.
Figure 20-1.
Figure 20-2.
Figure 20-3.
Figure 20-4.
Figure 20-5.
Figure 20-6.
Figure 20-7.
Figure 20-8.
Figure 20-9.
Figure 20-10. JTAG TRST Timing ........................................................................................................ 474
Figure 20-11. External Reset Timing (RST) .......................................................................................... 475
Figure 20-12. Power-On Reset Timing ................................................................................................. 475
Figure 20-13. Brown-Out Reset Timing ................................................................................................ 475
Figure 20-14. Software Reset Timing ................................................................................................... 476
Figure 20-15. Watchdog Reset Timing ................................................................................................. 476
Figure 21-1.
Figure 21-2.
July 26, 2008
Master Single RECEIVE ................................................................................................. 347
Master Burst SEND ....................................................................................................... 348
Ethernet Controller Block Diagram .................................................................................. 377
Ethernet Controller ......................................................................................................... 377
Ethernet Frame ............................................................................................................. 379
Analog Comparator Module Block Diagram ..................................................................... 420
Structure of Comparator Unit .......................................................................................... 421
Comparator Internal Reference Structure ........................................................................ 422
100-Pin LQFP Package Pin Diagram .............................................................................. 432
108-Ball BGA Package Pin Diagram (Top View) ............................................................... 433
Load Conditions ............................................................................................................ 465
I
External XTLP Oscillator Characteristics ......................................................................... 470
Hibernation Module Timing ............................................................................................. 471
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 471
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 472
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 472
JTAG Test Clock Input Timing ......................................................................................... 473
JTAG Test Access Port (TAP) Timing .............................................................................. 474
100-Pin LQFP Package .................................................................................................. 477
108-Ball BGA Package .................................................................................................. 479
2
C Timing ..................................................................................................................... 467
Preliminary
LM3S6911 Microcontroller
9

Related parts for LM3S6911