LM3S818 Luminary Micro, Inc, LM3S818 Datasheet - Page 357
LM3S818
Manufacturer Part Number
LM3S818
Description
Lm3s818 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S818.pdf
(392 pages)
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- Current page: 357 of 392
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February 6, 2007
Reset
Reset
Type
Type
Bit/Field
31:4
QEI Interrupt Enable (QEIINTEN)
Offset 0x020
3
2
1
0
RO
RO
31
15
0
0
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020
This register contains enables for each of the QEI module’s interrupts. An interrupt is asserted to
the controller if its corresponding bit in this register is set to 1.
RO
RO
30
14
0
0
reserved
IntTimer
IntIndex
IntError
Name
IntDir
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
When 1, an interrupt occurs when a phase error is
detected.
When 1, an interrupt occurs when the direction changes.
When 1, an interrupt occurs when the velocity timer
expires.
When 1, an interrupt occurs when the index pulse is
detected.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
IntError
R/W
RO
19
0
3
0
LM3S818 Data Sheet
IntDir
R/W
RO
18
0
2
0
IntTimer
R/W
RO
17
0
1
0
IntIndex
R/W
RO
16
0
0
0
357
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