LM3S2601 Luminary Micro, Inc, LM3S2601 Datasheet - Page 5

• Manufacturer Part Number: LM3S2601
• Description: Lm3s2601 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

10
10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 207
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 207
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 208
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 212
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 213
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 213
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 214
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 214
10.3.6 16-Bit PWM Mode ................................................................................................................... 215
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 265
12.2.2 Baud-Rate Generation ............................................................................................................. 266
12.2.3 Data Transmission .................................................................................................................. 266
12.2.4 Serial IR (SIR) ......................................................................................................................... 267
12.2.5 FIFO Operation ....................................................................................................................... 268
12.2.6 Interrupts ................................................................................................................................ 268
12.2.7 Loopback Operation ................................................................................................................ 269
12.2.8 IrDA SIR block ........................................................................................................................ 269
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 306
13.2.2 FIFO Operation ....................................................................................................................... 306
13.2.3 Interrupts ................................................................................................................................ 306
13.2.4 Frame Formats ....................................................................................................................... 307
13.3
13.4
13.5
14
14.1
July 26, 2008
General-Purpose Timers ................................................................................................. 205
Block Diagram ........................................................................................................................ 205
Functional Description ............................................................................................................. 206
Initialization and Configuration ................................................................................................. 212
Register Map .......................................................................................................................... 215
Register Descriptions .............................................................................................................. 216
Watchdog Timer ............................................................................................................... 241
Block Diagram ........................................................................................................................ 241
Functional Description ............................................................................................................. 241
Initialization and Configuration ................................................................................................. 242
Register Map .......................................................................................................................... 242
Register Descriptions .............................................................................................................. 243
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 264
Block Diagram ........................................................................................................................ 265
Functional Description ............................................................................................................. 265
Initialization and Configuration ................................................................................................. 269
Register Map .......................................................................................................................... 270
Register Descriptions .............................................................................................................. 271
Synchronous Serial Interface (SSI) ................................................................................ 305
Block Diagram ........................................................................................................................ 305
Functional Description ............................................................................................................. 305
Initialization and Configuration ................................................................................................. 314
Register Map .......................................................................................................................... 315
Register Descriptions .............................................................................................................. 316
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 342
2
C) Interface ............................................................................ 342
Preliminary
LM3S2601 Microcontroller
5