LM3401MMX National Semiconductor Corporation, LM3401MMX Datasheet - Page 11

• Manufacturer Part Number: LM3401MMX
• Description: Hysteretic Pfet Controller For High Power Led Drive
• Manufacturer: National Semiconductor Corporation

at the input and provides the instantaneous current when the
PFET turns on. The important parameters for the input ca-
pacitor are the voltage rating and the RMS current rating.
Follow the manufacturer’s recommended voltage de-rating.
RMS current can be calculated with the equation below. The
highest RMS current will occur around 50% duty cycle.
A ceramic input capacitor must be placed close to the drain
of the PFET. This minimizes the trace inductance between
V
input capacitor is not properly located, switching noise can
cause current limit and stability problems.
CATCH DIODE SELECTION
The catch diode provides the current path to the LED string
during the PFET off-time and must be rated higher than the
average current through the diode, which can be calculated
as shown:
The peak reverse voltage across the catch diode is approxi-
mately equal to the input voltage. Therefore, the diode’s peak
reverse voltage rating should be larger than the maximum in-
put voltage, plus some safety margin.
A Schottky diode is recommended because its low forward
voltage maximizes efficiency. For high temperature applica-
tions, diode leakage current may become significant and
require a higher reverse voltage rating or a low leakage diode
to achieve acceptable performance.
LED CURRENT ACCURACY
The total accuracy of average LED current is affected by sev-
eral factors, both internal and external to the LM3401. Total
static accuracy is the part-to-part variation and can be calcu-
lated from the equation below:
Where the worst case V
resistor accuracy. Because these factors are not correlated,
the RSS (root-sum-square) method of calculation is used.
The LED current will also show some variation with input volt-
age. This is primarily due to propagation delay and the dy-
namic resistance of the LED. In longer on-time operation, the
error due to dynamic resistance tends to dominate, while at
shorter on-time, the propagation delay will dominate. These
two effects counteract each other, resulting in typical regula-
tion curves similar to those shown in Figure 9. A larger induc-
tor will reduce the error due to propagation delay and will
result in better overall line regulation.
IN
and the PFET, which is a source of switching noise. If the
I
DIODE
SNS%
= I
is ±6%, and R
LED
x (1-D)
SNS%
is the sense
11
For most applications, the average LED current will be the
highest at the maximum input voltage and lowest at a duty
cycle somewhat greater than 50%. The maximum LED cur-
rent variation can be estimated as:
Where V
cycle of 60%. Since the actual input voltage where minimum
LED current occurs varies with the application, this is an ap-
proximation. As the duty cycle approaches 100%, the aver-
age LED current will approach I
current will be the highest at the point that 100% duty cycle is
reached. In the case that 100% duty cycle can occur, maxi-
mum LED current variation is calculated as:
PCB LAYOUT
PCB layout is very important in all switching regulator de-
signs. Poor layout can cause EMI problems, excess switching
noise, and improper device operation. The following key
points should be followed to ensure a quality layout.
Traces carrying large AC currents should be as wide and
short as possible to minimize trace inductance. These areas,
shown as darker regions in Figure 10, are:
- V
- GND between the input capacitor and catch diode
- The switch node
As shown in Figure 10, place the input capacitor ground as
close as possible to the anode of the catch diode. The VIN
side of the input capacitor should be placed close to the top
of the PFET.
The CS node (the node connecting the catch diode cathode,
inductor, and PFET source) should be kept as small as pos-
sible. This node is one of the main sources for radiated EMI.
The SNS and HYS pins are sensitive to noise. Be sure to route
the SNS trace away from the inductor and the switch node,
which are sources of noise.
FIGURE 9. LED DC current line regulation LED Vf = 7.0V
IN
between the input capacitor and PFET
IN_60%
is the input voltage corresponding to a duty
LED_PK
. The average LED
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