NE5562D Philipss, NE5562D Datasheet - Page 14

• Manufacturer Part Number: NE5562D
• Description: Switched-mode power supply control circuit
• Manufacturer: Philipss

Philips Semiconductors
DUTY CYCLE LIMIT (PIN 5)
The forward or buck converter, and even the flyback converters,
may require an automatic duty cycle limit to prevent transformer
saturation or unstable behavior. A special input provides access to
the PWM comparator for this purpose. As discussed previously in
regard to the error amplifier, increasing load demand may drive the
system current beyond safe limits. A simple solution is the
placement of a duty cycle limit within the system dynamic response
before this can occur. Figure 15 shows the PWM comparator with its
multiple input ports. All are inverting in polarity and provide a lowest
1994 Aug 31
Switched-mode power supply control circuit
Figure 21. Feed-forward Turn-On Delay Circuit
0.2 F
2N3906
220k
SIGNAL
PIN 11
SYNC
Figure 23. Sync Signal Relationship to Controlled Sawtooth Waveform
SYNC
1
NE/SE5562
+
V
FFWD
T
O
T
d
Figure 22. Synchronization Signals
SL00408
1.5V
11
14
NE/SE5562
SYNCHRONIZATION
The synchronization of the sawtooth oscillator to an external pulse
of negative-going polarity is shown in Figure 22. When the sync
input pulse crosses the 1.5V threshold, negative, the sawtooth
oscillator is prevented from discharging the timing capacitor, causing
the charge voltage on the capacitor to remain high (5.25V) until the
sync pulse again goes above 1.5V, allowing reset. This action
stretches the period of the oscillator and results in a lower frequency
under-synchronization control than the free-running frequency.
The following relationship holds—
A typical recommended starting point in calculating frequency for
synchronous operation is to set the free-run frequency
approximately 10% higher than the sync frequency. Then set the
pulse width, , to 10% of t
frequency determined by the sum as above.
priority level sensing circuit. The lowest level on Pin 4, 5, or 10 gains
control of the duty cycle limit. During normal operation, the
circuit sends a continuous threshold signal to the PWM comparator,
setting a fixed limit on how much the error amplifier is allowed to
increase the duty cycle in response to load demand. Figure 24
shows the circuit within the NE/SE5562 which actually controls duty
cycle as listed below:
1. Duty cycle ramp-up (slow-start) during power-up. Time constant
controlled by external R, C ramp voltage at Pin 5.
f
f
free run
sync
2
+V
CC
t
19
0
1
f
sync
T
SAWTOOTH
WAVEFORM
0
, the free-run period, with the desired new
+1.5V
NE/SE5562
Product specification
SL00409
SL00410
MAX