NE5562D Philipss, NE5562D Datasheet - Page 22

• Manufacturer Part Number: NE5562D
• Description: Switched-mode power supply control circuit
• Manufacturer: Philipss

Philips Semiconductors
conditions. All inputs are internal to the device and do not appear
directly on the external pins as is shown on Figure 37.
The additional flexibility of an invert control allows the polarity at the
output during duty cycle to be reversed. This provides a simple
THE INTERNAL VOLTAGE REGULATOR
The internal regulator is configured to provide for external supply to
the NE/SE5562 from either a voltage feed or a current feed.
For the current-fed mode, a series-dropping resistor may be used to
power the device from voltages greater than 18V with current supply
of 15 to 25mA. Note that supply current stated in the data sheet is
for the device only without load on the output or V
also are pulse-related and thus reflect frequency components onto
the current-feed circuit. These must be filtered out at Pin 7 with
adequately large capacitors in order to prevent motor-boating (see
Figure 38 and Figure 39).
Input current to Pin 7 flows through Zeners Z
regulator transmitter QR. A differential amplifier with 3.80V reference
provides feedback to regulate V
In the voltage-fed mode using Pin 17, the Zeners prevent current
flow through QR for input voltages less than 19V.
Power dissipation of the device must stay within the allowable
package limits. These limits are derived from the thermal
characteristics of the particular package chosen. The NE5562N
plastic package is capable of operating within the temperature range
(ambient) of 0 to +70 C. This rating applies to the surface-mount
product NE5562D also. Obviously, the power dissipation of the “D”
package is lower than the standard DIP. Thermal resistance for the
various packages are:
1994 Aug 31
20-Pin plastic—NE5562N/SE5562N:
Switched-mode power supply control circuit
PWM
LATCH
DOWN
SHUT
Q134
DEMAG
0.V
START/STOP
Q135
Q139
LATCH
S
Q136
to 15V.
OUTPUT
LATCH
R28
5k
3.80V
OUTPUT NCR
JA
Q137
Q125
61 C/W
1
and Z
Q138
R29
5k
Z
Q133
. Drive currents
2
1.5V
Q140
Figure 37. Output Driver Schematic
1.25k
, and shunt
R30
R31
10k
1.5V
Q126
Q148
1
Q141
R32
Q145 Q146 Q147
3k
Q149
Q142
Q127
22
R33
5k
Q143
means of designing with P-channel power MOS FETs without adding
external inverters. The invert logic is controlled by a simple logic
signal at Pin 15. Grounding will cause the output to be a normal
positive output and a high level gives inverted output.
NOTE:
1. See Figures 7 and 8 for internal Regulator Response Curves.
Design Example—An NE5562N is operated at 40 C ambient in the
voltage-fed mode with V
Q128 R35
NORM
R34
20-Pin glass/ceramic—NE5562F/ SE5562F:
20-Pin SO: -55 to +85 C/W (board-dependent)
5k
Q144
3k
Q151
Q150
INVERT
R30
Q129 Q131
V
15
Z
R41
47-100 F
5k
35V
P
Q130
BIAS
15
R37
10k
Q152
+
R42
Figure 38. Current-Feed
R38
1k
1k
NE/SE5562
S
=15V; assume I
Q132
7
20
Q153
Q154
Q160
R39
300
++V
Q155
Q163
Q161
R43
19
4k Q162
Q158
S
=22mA average:
NE/SE5562
Q164
Q157
Product specification
JA
Q159
Q165
90 C/W
Q165
Q156
17
19
R40
2.5
OUTPUT
SL00424
+V
SL00425
5