CA3292A Intersil, CA3292A Datasheet - Page 6

• Manufacturer Part Number: CA3292A
• Description: Quad-Gated Inverting Power Drivers with Fault Mode Diagnostic Flag Output
• Manufacturer: Intersil

The output will continue to turn on and off for as long as the
shorted condition exists or until shutdown by the input logic.
The resulting frequency and duty cycle of the output current
flow is determined by the ambient temperature, the thermal
resistance of the package in the application and the total
power dissipation in the package. Since each output is inde-
pendently protected, the frequency and duty cycle of the cur-
rent flow into multiple shorted outputs will not be related in
time. Long lead lengths in the load circuit may lead to oscilla-
tory behavior if more than two output loads are shorted.
Since a diagnostic flag indicates when an output is shorted,
this information can be used as input to a microprocessor or
dedicated logic circuit to provide a fast switch-off when a
short occurs and, by sequence action, can be used to deter-
mine which output is shorted. A fault condition in any output
load will cause the FAULT output to switch to a logic “low”.
Since a fault condition may be detected during switching,
use of an appropriate size capacitor to filter the FAULT out-
put is recommended. The recommended FAULT output cir-
cuit is shown in Figure 2. This will prevent the FAULT output
voltage from reaching a logic level “0” within the maximum
switching time.
The FAULT detection circuitry compares the state of the
input and the state of the output for each A, B, C and D
channel. The output is considered to be in a high state if the
voltage exceeds the typical FAULT threshold reference volt-
age, V
output is considered to be in a low state. For example, if the
input is high and the output is less than V
“ON” condition exists and the FAULT output is high. If the
input is high and the output is greater than V
load condition is indicated and the FAULT output is low.
When the input is low and the output is greater than V
normal “OFF” condition is indicated and the FAULT output is
high. If the input is low and the output is less than V
open load condition exists and the FAULT output is low. The
Output Driver Fault Sense state is determined by high and
low comparator threshold limits which are defined in the
Fault Parameters section of the Electrical Specifications.
FIGURE 3. OUTPUT OPEN LOAD DETECTION WHERE I
THD
of 4V. If the output voltage is less than V
IS AN ACTIVE CURRENT SINK PULLDOWN FOR
OPEN-LOAD FAULT DETECTION. THE CURRENT
I
THE OUTPUT DRIVER
CEX
ZENER
CLAMP
IS I
T
LIM
O(SINK)
4V
I
LIM
PLUS LEAKAGE CURRENTS OF
FAULT SENSE
THRESHOLD, V
Z
A
Q
0.02
A
THD
2
OUT A
I
O(SINK)
THD
THD
V
BATT
CA3272A, CA3292A
R
, a normal
, a shorted
LOAD
THD
THD
O(SINK)
THD
, the
, an
, a
6
The FAULT output diagram of Figure 2 shows the circuit
component interface for sensing a diagnostic fault condition.
As noted, the time constant of T
than the ON-OFF output switching times to avoid false fault
readings during switching. For applications requiring fast
period repetition rates, the maximum time constant should
be significantly less than the period of switching. The short-
est practical time constant is preferred to limit the duration of
a fault condition.
To match a standard CMOS or TTL interface, the switched
current at the FAULT pin must be converted to V
voltage levels using the R
imum specified I
(Fault) state which is used to test for a V
0.4V. This makes the calculation for the V
tively simple. Where V
the power supply voltage, R
from the FAULT pin and I
rent, I
V
As an example: Since TTL is the worst case for a low state,
V
minimum I
worst case limit, the minimum value of R
R
The preferred value for R
calculated.
For the logic V
V
Where the I
I
value for R
resistance. To determine that the minimum V
FAULT pin is greater than V
is calculated using Equation 2. For example, using the mini-
mum R
V
which is more than suitable for CMOS or TTL Input switching
levels; suggesting that a larger value of R
could be used for a better noise margin in the Low fault state.
To detect an open load, each output has an internal low-level
current sink, shown in Figure 3, which acts as a pull-down
under open load fault conditions and is always active. The mag-
nitude of this current plus any leakage associated with the out-
put transistor will always be less than 100 A. (The data sheet
specification for I
rent). The output load resistance must be chosen such that the
voltage at the output will not be less than V
sink current flows through it under worse case conditions with
minimum supply voltage. For example, assume a 6.5V mini-
mum driver output supply voltage, a FAULT threshold reference
voltage of V
I
not result in a FAULT output low state when the output is OFF.
F(LK)
CEX
F
X
F
F
IL
= V
= V
= [5 - (4.6k x 20 A)] = 4.9V
= (V
= 0.8V. Using V
= 100 A. Calculate the maximum load resistance that will
O(SINK)
CC
CC
at the FAULT pin, it remains to check the calculated
CC
X
- R
- R
resistor value calculated for the CA3272A,
- V
OL
X
X
X
IL
I
I
OH
THD
, the low state equation is:
as a leakage current times the chosen pullup
OL
OH
= 1mA for the CA3272A and CA3292A. At the
)/I
IH
OL
OL
CEX
High (normal state),
current is the specified leakage current,
V
V
= (5 - 0.4)V/0.001mA = 4.6k
= 5.5V and an output current sink of
CC
limit at the FAULT output defines the Low
IL
IH
includes this internal low-level sink cur-
F
= 5V, maximum V
is the FAULT output voltage, V
X
X
OL
would be greater than the values
external pullup resistor. The min-
IH
X
is the fault condition sink cur-
to an external logic match, V
is the pullup resistor to V
X
= R
X
C
OL
X
X
F
THD
IL
is:
= V
should be greater
X
maximum limit of
input level rela-
(such as
OL
when the I
OH
= 0.4V and
IH
from the
and V
(EQ. 1)
(EQ. 2)
10k
CC
CEX
CC
IL
is
F