CS4272 Cirrus Logic, CS4272 Datasheet - Page 22

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CS4272

Manufacturer Part Number
CS4272
Description
24-Bit / 192 kHz Stereo Audio CODEC
Manufacturer
Cirrus Logic
Datasheet

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SWITCHING CHARACTERISTICS - SPI CONTROL PORT
(Inputs: logic 0 = AGND, logic 1 = VL)
Notes: 24. t
22
SPI Mode
CCLK Clock Frequency.
RST Rising Edge to CS Falling.
CCLK Edge to CS Falling.
CS High Time Between Transmissions.
CS Falling to CCLK Edge.
CCLK Low Time.
CCLK High Time.
CDIN to CCLK Rising Setup Time.
CCLK Rising to DATA Hold Time.
Rise Time of CCLK and CDIN.
Fall Time of CCLK and CDIN.
25. Data must be held for sufficient time to bridge the transition time of CCLK.
26. For F
spi
only needed before first falling edge of CS after RST rising edge. t
SCK
< 1 MHz
CCLK
CDIN
RST
CS
Parameter
t srs
t spi
t r2
t css
Figure 7. SPI Control Port Timing
(Note 24)
(Note 25)
(Note 26)
(Note 26)
t scl
t f2
t dsu t
t sch
dh
Symbol
f
t
t
t
t
t
t
t
t
sclk
dsu
csh
css
sch
t
t
srs
spi
scl
dh
r2
f2
Min
500
500
1.0
20
82
82
40
15
-
-
-
spi
t csh
= 0 at all other times.
Max
100
100
6
-
-
-
-
-
-
-
-
CS4272
DS593F1
MHz
Unit
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns

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