CS8415A Cirrus Logic, CS8415A Datasheet - Page 11
CS8415A
Manufacturer Part Number
CS8415A
Description
96 kHz DIGITAL AUDIO INTERFACE RECEIVER
Manufacturer
Cirrus Logic
Datasheet
1.CS8415A.pdf
(42 pages)
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ter clock, but the serial bit clock can be asynchro-
nous and discontinuous if required. By appropriate
phasing of the left/right clock and control of the se-
rial clocks, multiple CS8415A’s can share one se-
rial port. The left/right clock should be continuous,
but the duty cycle can be less than the specified typ-
ical value of 50% if enough serial clocks are
present in each phase to clock all the data bits.
When in slave mode, the serial audio output port
must not be set for right-justified data. When using
DS470PP3
the serial audio output port in slave mode with an
OLRCK input which is asynchronous to the incom-
ing AES3 data, then an interrupt bit(OSLIP) is pro-
vided to indicate when repeated or dropped
samples occur.
The CS8415A allows immediate mute of the serial
audio output port audio data by the MUTESAO bit
of Control Register 1.
CS8415A
11