CY7C4265-10AC Cypress Semiconductor Corp, CY7C4265-10AC Datasheet - Page 11

IC DEEP SYNC FIFO 16KX18 64LQFP

CY7C4265-10AC

Manufacturer Part Number
CY7C4265-10AC
Description
IC DEEP SYNC FIFO 16KX18 64LQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C4265-10AC

Function
Synchronous
Memory Size
288K (16K x 18)
Data Rate
100MHz
Access Time
8ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1235
Switching Waveforms
Document #: 38-06004 Rev. *A
Programmable Almost Empty Flag Timing (applies only in SMODE (SMODE is LOW))
Programmable Almost Full Flag Timing
Notes:
22. PAE offset
23. t
24. If a read is preformed on this rising edge of the read clock, there will be Empty + (n 1) words in the FIFO when PAE goes LOW.
25. PAF offset = m. Number of data words written into FIFO already = 8192
26. PAF is offset = m.
27. 8192 m words in CY7C4255 and 16384 – m words in CY7C4265.
28. 8192
PAF
WEN2
WCLK
WCLK
the rising RCLK is less than t
SKEW3
RCLK
RCLK
WEN
WEN
REN
PAE
REN
[26]
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK and
(m + 1) words in CY7C4255 and 16384 – (m + 1) CY7C4265.
n.
t
CLKH
SKEW3
(continued)
, then PAE may not change state until the next RCLK.
t
SKEW3
t
CLKH
t
t
ENS
ENS
[23]
t
t
ENH
ENH
t
CLKL
Note
Note
22
t
ENS
25
(m + 1) for the CY7C4255 and 16384
t
ENH
t
PAE synch
t
CLKL
t
PAF
t
t
ENS
ENS
FULL– M WORDS
N + 1 WORDS
INFIFO
INFIFO
t
ENS
[27]
t
PAF
t
ENH
(m + 1) for the CY7C4265.
FULL– (M+1) WORDS
Note
24
IN FIFO
CY7C4255
CY7C4265
Page 11 of 22
t
PAE synch
[28]
4255–14
4255–15

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