AD9204BCPZRL7 Analog Devices, Inc., AD9204BCPZRL7 Datasheet

AD9204BCPZRL7

Manufacturer Part Number

AD9204BCPZRL7

Description

10-bit, 20/40/65/80 Msps, 1.8v Dual Analog-to-digital Converter

Manufacturer

Analog Devices, Inc.

Datasheet

1.AD9204BCPZRL7.pdf (4 pages)

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Preliminary Technical Data

FEATURES

1.8 V analog supply operation

1.8 V to 3.3 V output supply

SNR = 59 dBFs up to 170 MHz input

SFDR = 75 dBc up to 70 MHz input

Low ADC core power:

Differential input with 650 MHz bandwidth

On-chip voltage reference and sample-and-hold amplifier

DNL = ±0.5 LSB

Flexible analog input: 1 V p-p or 2 V p-p differential

Offset binary, Gray Code, or Twos Complement data format

Clock duty cycle stabilizer

Programmable Clock Divider

Data output clock

Serial port control

APPLICATIONS

Ultrasound equipment

IF sampling in communications receivers

Direct conversion sampling

Battery-powered instruments

Hand-held scope meters

GENERAL DESCRIPTION

The AD9204 is a monolithic, dual channel 1.8 V supply, 10-bit,

20/40/65/80 MSPS analog-to-digital converter (ADC), featuring

a high performance sample-and-hold circuit and on-chip

voltage reference. The product uses a multi-stage differential

pipeline architecture with output error correction logic to

provide 10-bit accuracy at 80 MSPS data rates and guarantees

no missing codes over the full operating temperature range.

The ADC contains several features designed to maximize

flexibility and minimize system cost, such as programmable

clock and data alignment and programmable digital test pattern

generation. The available digital test patterns include built-in

deterministic and pseudorandom patterns, along with custom

user-defined test patterns entered via the serial port interface (SPI).

A differential clock input controls all internal conversion cycles. A

duty cycle stabilizer (DCS) compensates for wide variations in the

clock duty cycle while maintaining excellent overall ADC

performance.

Rev. PrC

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Programmable clock and data alignment

Built-in selectable digital test pattern generation

28 mW/ch @ 20MSPS

65 mW/ch @ 80MSPS

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

The digital output data is available in Offset Binary, Gray Code, or

Twos Complement formats. A data output clock (DCO) is

provided for each ADC channel to ensure proper latch timing

with receiving logic. Available in a in a 64-lead Pb-free LFCSP,

the AD9204 is specified over the industrial temperature range

(−40°C to +85°C).

PRODUCT HIGHLIGHTS

Dual Analog-to-Digital Converter

SENSE

RBIAS

VIN+A

VIN-B

VIN+B

VIN-A

VREF

VCM

10-Bit, 20/40/65/80 MSPS, 1.8V

The AD9204 operates from a single 1.8 V power supply

and features a separate digital output driver supply to

accommodate 1.8 V to 3.3 V logic families.

The patented sample and hold circuit maintains excellent

performance for input frequencies up to 200 MHz and is

designed for low cost, low power and ease of use.

A standard serial port interface (SPI) supports various

product features and functions, such as data formatting

(offset binary, twos complement, or Gray coding), enabling

the clock DCS, power-down, and voltage reference mode.

The AD9204 is pin compatible with the 12bit AD9231 and

14bit AD9251, allowing for a simple migration between 10

bits and 14 bits.

CLK+ CLK-

SELECT

AVDD

REF

FUNCTIONAL BLOCK DIAGRAM

DIVIDE

1 TO 8

SYNC

GND

ADC

DUTY CYCLE

Figure 1.

STABILIZER

DCS

AD9204

PROGRAMMING DATA

SDIO SCLK CSB

SPI

PDWN

CONTROLS

MODE

DFS

OEB

AD9204

www.analog.com

DRVDD

ORA

DCOA

ORB

DCOB

D0A

D0B

D9A

D9B

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AD9204BCPZRL7 Summary of contents

Page 1

... The AD9204 is pin compatible with the 12bit AD9231 and 14bit AD9251, allowing for a simple migration between 10 bits and 14 bits. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. AD9204 ORA D9A D0A DCOA ...

Page 2

AD9204 CLK+ 1 CLK- 2 SYNC DRVDD 10 D0B (LSB) 11 D1B 12 D2B 13 D3B 14 D4B 15 D5B ...

Page 3

Preliminary Technical Data Pin # Name 0 GND 49, 50, 53, 54, AVDD 59, 60, 63, 64 10, 19, 28, 37 DRVDD 51, 52 AINA+/- 62, 61 AINB+/- 1, 2 CLK+, CLK- 58 RBIAS 57 VCM 56 SENSE 55 VREF ...

Page 4

... AD9204BCPZRL7–65 –40°C to +85°C 1,2 AD9204BCPZ-40 –40°C to +85°C 1,2 AD9204BCPZRL7–40 –40°C to +85°C 1,2 AD9204BCPZ-20 –40°C to +85°C 1,2 AD9204BCPZRL7–20 –40°C to +85°C 1 AD9204Z-80EB AD9204Z-65EB 1 1 AD9204Z-40EB 1 AD9204Z-20EB Pb-free part. 2 The exposed paddle is the only GND connection on the chip and must be connected to the PCB AGND. ...

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