AD9204BCPZRL7 Analog Devices, Inc., AD9204BCPZRL7 Datasheet - Page 3

• Manufacturer Part Number: AD9204BCPZRL7
• Description: 10-bit, 20/40/65/80 Msps, 1.8v Dual Analog-to-digital Converter
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
11-18, 20, 21
32-36, 38-42
4-9, 25-27, 29-31
Pin #
0
49, 50, 53, 54,
59, 60, 63, 64
10, 19, 28, 37
51, 52
62, 61
1, 2
58
57
56
55
46
45
44
3
47
48
22
43
23
24
Name
GND
AVDD
DRVDD
AINA+/-
AINB+/-
CLK+, CLK-
RBIAS
VCM
SENSE
VREF
CSB
SCLK/DFS
SDIO/DCS
SYNC
OEB
PDWN
D0B-D9B
D0A-D9A
ORB
ORA
DCOB
DCOA
DNC
Channel B Data Clock digital output.
Channel A Data Clock digital output.
Do Not Connect
Channel B digital outputs. D9B = MSB
Channel A digital outputs. D9A = MSB
Channel B Out-of-Range digital output.
Channel A Out-of-Range digital output.
Digital Output Driver Supply (1.8V to 3.3V)
Channel “A” analog inputs.
Channel “B” analog inputs.
Sets analog current bias. Connect to 10kohm (1% tolerance) resistor to ground.
SPI chip select; active low enable. 50Kohm internal pullup.
SPI clock. Static control of data output format, DFS, if not in SPI mode.
If “high”: twos complement.
If “low”: offset binary.
50Kohm internal pulldown.
SPI data in/out. Static enable for Duty Cycle Stabilizer if not in SPI mode. 50Kohm internal pulldown in
SPI mode. 50Kohm internal pullup in non-SPI mode.
Digital input. SYNC input to clock divider. 50Kohm internal pulldown.
Digital input. Enable channel “A” & “B” digital outputs if “low”; tri-state outputs if “high”. 50Kohm
internal pulldown.
Digital input. Powerdown chip if “high”. 50Kohm internal pulldown.
Description
Exposed paddle is the only ground connection for the chip. Must be connected to PCB AGND.
1.8V Analog supply pins.
Differential encode clock; PECL, LVDS or 1.8V CMOS inputs.
Analog output voltage at mid supply to set common mode of the analog inputs.
Reference Mode Selection
Voltage Reference Input/Output
Rev. PrC | Page 3 of 4
AD9204