74HCT112PW,112 NXP Semiconductors, 74HCT112PW,112 Datasheet - Page 11
![IC DUAL JK F-F NEG-EDGE 16-TSSOP](/photos/6/56/65607/568-16-tssop_sot403-1_sml.jpg)
74HCT112PW,112
Manufacturer Part Number
74HCT112PW,112
Description
IC DUAL JK F-F NEG-EDGE 16-TSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
JK Typer
Datasheets
1.74HCT4046ADB112.pdf
(19 pages)
2.74HCT4046ADB112.pdf
(23 pages)
3.74HCT112PW112.pdf
(15 pages)
Specifications of 74HCT112PW,112
Output Type
Differential
Package / Case
16-TSSOP
Function
Set(Preset) and Reset
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
64MHz
Trigger Type
Negative Edge
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
HCT
Logic Type
J-K Negative Edge Triggered Flip Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
19 ns
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Delay Time - Propagation
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2769-5
935198490112
935198490112
Philips Semiconductors
Test circuit for 74HC
AC waveforms 74HC (continued)
March 1988
handbook, full pagewidth
HCMOS family characteristics
C
R
L
T
=
=
load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
OFF-to-LOW
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
MGK562
OUTPUT
OUTPUT
OUTPUT
ENABLE
handbook, halfpage
GENERATOR
Fig.6 Propagation delays of 3-state outputs.
90%
PULSE
50%
t f
10%
t PLZ
enabled
outputs
t PHZ
Fig.5 Test circuit.
V I
10%
R T
90%
11
o
D.U.T
V CC
of
disabled
outputs
t r
V O
t PZL
t PZH
C L
FAMILY SPECIFICATIONS
MGK565
50%
50 pF
50%
outputs
enabled
V CC
GND