74HC377D,652 NXP Semiconductors, 74HC377D,652 Datasheet - Page 11

• Manufacturer Part Number: 74HC377D,652
• Description: IC OCTAL D F-F POS-EDGE 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: D-Type Busr

Specifications of 74HC377D,652

• Output Type: Non-Inverted
• Package / Case: 20-SOIC (7.5mm Width)
• Function: Standard
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 83MHz
• Delay Time - Propagation: 13ns
• Trigger Type: Positive Edge
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: HC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 13 ns at 5 V
• High Level Output Current: - 5.2 mA
• Low Level Output Current: 5.2 mA
• Supply Voltage (max): 6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 2 V
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 5V
• Package Type: SOIC W
• Frequency (max): 24MHz
• Operating Supply Voltage (min): 2V
• Operating Supply Voltage (max): 6V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-2670-5; 933713980652

Philips Semiconductors
Test circuit for 74HC
AC waveforms 74HC (continued)
March 1988
handbook, full pagewidth
HCMOS family characteristics
C
R
L
T
=
=
load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
OFF-to-LOW
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
MGK562
OUTPUT
OUTPUT
OUTPUT
ENABLE
handbook, halfpage
GENERATOR
Fig.6 Propagation delays of 3-state outputs.
90%
PULSE
50%
t f
10%
t PLZ
enabled
outputs
t PHZ
Fig.5 Test circuit.
V I
10%
R T
90%
11
o
D.U.T
V CC
of
disabled
outputs
t r
V O
t PZL
t PZH
C L
FAMILY SPECIFICATIONS
MGK565
50%
50 pF
50%
outputs
enabled
V CC
GND