THAT4311 ETC, THAT4311 Datasheet - Page 6

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THAT4311

Manufacturer Part Number
THAT4311
Description
Low-voltage/ Low-power Analog Engine Dynamics Processor
Manufacturer
ETC
Datasheet
Page 6
cessor combines THAT,s proven Voltage-Controlled
Amplifier (VCA) and RMS-Level Detector designs with
three opamps to produce a multipurpose dynamics
processor useful in a variety of applications. For de-
tails of the theory of operation of the VCA and RMS
Detector building blocks, the interested reader is re-
ferred to THAT Corporation’s data sheets on the
218x Series VCAs and the 2252 RMS-Level Detector.
Theory
tially-controlled VCAs and log-responding level detec-
tors is covered in THAT Corporation’s application
note AN101, The Mathematics of Log-Based Dynamic
Processors.
The VCA - in Brief
tion’s highly successful complementary log/anti-log
gain cell topology, as used in THAT’s 218x and
215x-Series IC VCAs. The THAT 4311 is integrated
using a fully complementary, BiFET process.
combination of FETs with high-quality, complemen-
tary bipolar transistors (NPNs and PNPS) allows ad-
ditional flexibility in the design of the VCA over
previous efforts.
The THAT 4311 Analog Engine â Dynamics Pro-
The THAT 4311 VCA is based on THAT Corpora-
Decoder In
of
the
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
interconnection
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
C6
10u
C16
10u
+
261k
R12
R11
15k
+
Fig 16. THAT 4311 Noise Reduction Decoder Schematic
V+
1
2
10
11
IN
Iset
THAT4311
of
Vcc
Vee
THAT4311
U1B
RMS
Theory of Operation
+
3u3
Vref
C4
U1E
OUT
exponen-
TC
Vref
Cap
24k3
4
5
R5
+
The
9
8
10u
C5
+
17
C2
10u
IN
15
EC+
VCA
16
R9
51R
EC-
14
This pin is a virtual ground biased at VREF , so in
normal operation an input voltage is converted to in-
put current via an appropriately sized resistor (R5 in
Fig 2, Page 3). Because the current associated with
DC offsets relative to VREF present at the input pin
and any DC offset in preceding stages will be modu-
lated by gain changes (thereby becoming audible as
thumps), the input pin is normally AC-coupled (C4 in
Fig 2).
with respect to the input current. In normal opera-
tion, the output current is converted to a voltage via
inverter OA3, where the ratio of the conversion is de-
termined by the feedback resistor (R6, Fig 2) con-
nected between OA3’s output and its inverting input.
The signal path through the VCA and OA3 is
non-inverting.
applied between EC- and the combination of EC+
and SYM. Gain (in decibels) is proportional to EC-,
provided that EC+ and SYM are at VREF . The con-
stant of proportionality is -6.1mV/dB (for 5V sup-
plies) for the voltage at EC-, and 6.1mV/dB for the
voltage at EC+, and SYM
SYM
OUT
+
Input signals are currents to the VCA IN pin.
The VCA output signal is also a current, inverted
The gain of the VCA is controlled by the voltage
C3
22u
13
Vref
150k
R8
56k
R2
Low-voltage, Analog Engine
OA3
+
_
U1A
THAT4311
8k87
7k5
R3
R4
+15
12
R7
20k
+
19
20
10u
C7
6k04
24k3
OA1
+
_
R1
R6
U1D
THAT4311
18
Preliminary Information
®
C1
3n3
Decoder Out
Dynamics Processor

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