MCM20027 Motorola, MCM20027 Datasheet
MCM20027
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MCM20027 Summary of contents
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... CLCC package The MCM20027 is a fully integrated, high performance CMOS image sensor with features such as integrated timing, control, and analog signal processing for digital imaging applications. The part provides designers a complete im- aging solution with a monolithic image capture and processing engine thus making it a true “camera on a chip”. Sys- tem benefits enable design of smaller, portable, low cost and low power systems ...
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... Power Dissipation: 250mW RMS, operating @13.5Mhz Package: 48 pin ceramic LCC Temperature Operating Range: 0-40 1280 x 1024 pixels (1296 x 1048 total including dark and isolation Column White FRC Offset Balance Figure 1. MCM20027 Simplified Block Diagram MOTOROLA o C Digital Control Sensor Interface I2C Serial Interface 10 Bit Global ...
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... Bias V CVREFP 15 refm Generation V EXTRES 20 I EXTRESRTN bias See “MCM20027 Pin Definitions” on page 67 Revision 8 November 2001 : MCM20027 1296 4Dark + 4Isolation Image Sensor Pixel Array 1024 1280 12Dark +4Isolation Column Decode, Sensing, and Muxing Color Sequencer ...
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... Digitally Programmable Gain Amplifiers (DPGA) for White Bal- ance and Exposure Gain................................................................ 7.4.1 White Balance Control PGA........................................................... 7.4.2 Exposure Global Gain PGA............................................................ 7.4.3 Gain Modes..................................................................................... 7.5 Global Digital Offset Voltage Adjust (DOVA)................................ 7.6 Analog to Digital Converter (ADC)................................................ 8.0 MCM20027 Sensor External Controls........................................... 8.1 Initialization .................................................................................... 8.2 Standby Mode............................................................................... MOTOROLA Table Of Contents Revision 8 November 2001 : ImageMOS ImageMOS ...
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... Suggested Software Register Changes........................................ 12.0 MCM20027 Utility Programming Registers................................... 12.1 Register Reference Map ................................................................ 13.0 Detailed Register Block Assignments.......................................... 14.0 Electrical Characteristics .............................................................. 15.0 MCM20027 Pin Definitions............................................................. 16.0 MCM20027 Packaging Information................................................ 17.0 MCM20027 Typical electrical connection..................................... Revision 8 November 2001 : MCM20027 Table Of Contents 2 C Bus Protocol ........................................................ C Bus Clocking and Synchronization........................................ ImageMOS ImageMOS ...
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... MOTOROLA SEMICONDUCTOR TECHNICAL DATA No Description Digital Camera Reference 1 Design utilizing the MCM20027 Information on MCM20027 2 Optics 3 Information on Strobe Timing MOTOROLA Reference Documentation Release Name of Document Date Roadrunner May 4 2001 Application Note Optic Application Feb 7 2001 note Strobe Timing May 30 2001 Application Note Table 1 ...
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... MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1.0 MCM20027 Overview The MCM20027 is a solid state CMOS Active CMOS TM Imager (ACI ) that integrates the functionality of a complete analog image acquisition, digitizer, and digital signal processing system on a single chip. The image sensor comprises a format pixel array with 1280x1024 active elements ...
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... Transfer Gate 2 and the Reset Gate open (On). Af- ter 1 Row Period [T (Off). This action causes Photodiode 2 to start charging. When the integration (charging) of Photdiode 1 has ImageMOS ImageMOS ) and ground (V ) connec ROW SELECT GATE T row T=4 T=5 T=6 T=3 ], @T=2 ,Transfer Gate 2 closes row Revision 8 November 2001 : MCM20027 8 ...
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... Color Separation and Fill Factor Enhancement The MCM20027 family is offered with the option of monolithic polymer color filter arrays (CFAs). The com- bination of an extremely planarized process and propri- Revision 8 November 2001 : ...
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... Pixel Data Stream Signal Control 62, it causes the output Description Data Start of Row read- 3FF3FF3FF3FF out (i.e.. Readout of Row 1) Start of Row read- 3FF3FF000000 out of Rows 2+ Readout of last Row 000000000000 complete Revision 8 November 2001 : Figure Video de- MCM20027 10 ...
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... SOF VCLK HCLK Pixel Array Values ADC[9:0] Revision 8 November 2001 : MCM20027 mode” on page Rows have been integrated and readout. Once readout of the entire frame is complete, the sensor awaits a new SYNC signal before it starts integration and readout of another frame. The waveforms depicting the SFRS output data stream ...
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... Sub-sample Control Register = x0010101 Progressive Scan Bayer Pattern Read 1 Pattern, Skip 1 Pattern both directions Revision 8 November 2001 : = b MCM20027 12 ...
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... Depth registers (Table 42 on page 55 page 55). -1 Frame Rate = (Frame time) Revision 8 November 2001 : MCM20027 6.2 Integration Time in CFRS mode: In Continuous Frame Rolling Shutter capture mode, the Integration time is defined as: Integration Time=T where cint for integration time. Therefore, the integration time in CFRS mode can be adjusted in steps of virtual frame row times ...
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... Time in CFRS mode:” on page ImageMOS ImageMOS cint are typically varied frame Trow d T =(1034 + 1)* 98.44 frame = 101. Integration time+Readout time = 34.5ms + 101.34ms = 135.84ms T T int frame 34.5ms 101.34 ms 34.5ms 135.84ms < (vrd + frame d row 13) Revision 8 November 2001 : MCM20027 14 ...
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... Stage 1X LRCLMP Figure 13. FRC Conceptual Block Diagram On the MCM20027, dark pixel input signals should be sampled for a minimum of 137 s to allow the two 0.1 F capacitors at the CLRCA and CLRCB pins sufficient time to charge for 10-bit accuracy. This guarantees that the FRC’s “droop” will be maintained at <750 V, thus assuring the specified ADC 10-bit accuracy at +0 ...
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... SEMICONDUCTOR TECHNICAL DATA 7.3 Programmable Per-Column Offset A programmable per-column offset adjustment is avail- able on the MCM20027. In order to reduce the risk and have the ability to cover any mode of repetitive column Fixed Pattern Noise (FPN), there exists 64 registers that can be programmed with a DC offset that is added to all columns. (Mod64 Column Offset registers ...
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... NOTE!! The Diagrams above illustrates how the Color Gain Registers apply the gain onto each individual color pixel data: Revision 8 November 2001 : MCM20027 There are two different Gain modes for White Balance and there are three different Gain modes for the Expo- sure gain refer to Formulas ...
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... Exposure PGA Gain Register A ImageMOS ImageMOS Gain Formula 0.6956 + (0.02174* gg1 ) d 1.391+ (0.0434* (gg1 -32) d 0.6956 +(0.0434 x gg1 ) d 0.6956 + (0.0434 * gg2 ) d 0.6956 + (0.02174* cg2 ) d 1.391+ (0.0434* (cg2 -32) d 0.6956 +(0.0434 x cg2 ) d 0.6956 + (0.0434 * gg2 ) d Register B Revision 8 November 2001 : Gain Range 0.69-1.39 1.39-2.74 0.69-2.74 0.69-3.60 0.69-1.39 1.39-2.74 0.69-2.74 0.69-3.60 MCM20027 18 ...
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... SEMICONDUCTOR TECHNICAL DATA 7.5 Global Digital Offset Voltage Adjust (DOVA) A programmable global offset adjustment is available on the MCM20027. A user defined offset value is loaded via a 6-bit signed magnitude programming code via the Global DOVA Register, (Table 28), on page Offset correction allows fine-tuning of the signal to re- move any additional residual error which may have ac- cumulated in the analog signal path ...
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... Standby Mode The standby mode option is implemented to allow the user to reduce system power consumption during peri- ods which do not require operation of the MCM20027. This feature allows the user to extend battery life in low power applications. By utilizing this mode, the user may reduce dynamic power consumption from 250mW RMS nominal @13.5MHz to < ...
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... Additional power savings can be achieved at lower clock rates. Note - The External Bias resistor Input pin (EXTRESP - pin #20) should be connected to the ETRESRTN (pin#19) in the manner described in the di- agram below. EXTRESP (pin #20) EXTRESRTN (pin #19) Revision 8 November 2001 : MCM20027 Resistor ImageMOS ImageMOS MOTOROLA 21 ...
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... Figure 20, on page VCLK Delay Register, and SOF & VCLK Signal Length 57. For timing di- 22, Figure 6, on page 11, Figure 7, on and Figure 16, on Figure 20, on Figure 15, on page 22, Figure 6, on page ,and Figure 8, on page Revision 8 November 2001 : 67). toFig- 60. For 11, 12. MCM20027 22 ...
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... Rising edge of MCLK to rising edge of HCLK delay time drhclk t Falling edge of MCLK to falling edge of HCLK delay time dfhclk t MCLK to ADC[9:0] delay time dadc t MCLK to STROBE delay time strobe Revision 8 November 2001 : MCM20027 Figure 15) Characteristic ImageMOS ImageMOS Min Typ Max Unit 1 11.5 13.5 MHz 3 ...
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... MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9.5 Strobe Signal The Strobe signal is a output pin on the MCM20027 sensor that can be used to activate ‘Flash/Strobe illumi- nation modules”. It can be activated by writing a “1” to bit 3 of “Sync and Strobe Control register” on page 50 while in SFRS mode. When activated, the Strobe signal ...
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... Virtual Row Depth (vrd ) = 1034 d 4) Sample & hold time (shs ) = Sample & hold time (shr ) = MCLK = 13 Mhz Revision 8 November 2001 : MCM20027 Variables: Integration Time (cint ) row the time of the Strobe signals intmin + 19) d Calculations: Row Time =Trow = (vcwd + shsd + shrd + 19) ...
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... C, see “The I Theory to Practice” by Dominique Paret and Carll- Fenger, published by John Wiley & Sons, ISBN 0471962686. 10.1 MCM20027 Bus Protocol The MCM20027 uses the bus to write or read one register byte per start/stop cycle as shown in 17 and Figure 18. These figures will be used to describe the various parts of the protocol communications as it applies to the MCM20027 ...
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... SCLK SDATA Data to write MCM20027 Register 10 Bus Clocking and Synchronization Open drain outputs are used on the SCLK outputs of all master and slave devices so that the clock can be syn- chronized and stretched using wire-AND logic. This means that the slowest device will keep the bus from going faster than it is capable of receiving or transmit- ting data ...
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... Address was received • At this point, the MCM20027 transitions from a “Slave-Receiver” “Slave-Transmitter” • MCM20027 sends the SCLK and the Register Data contained in the Register Address that was previ- MOTOROLA ously received from the master; MCM20027 transi- tions to slave-receiver • ...
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... Stop Signal from MASTER Figure 18. READ Cycle using Bus ImageMOS ImageMOS LSB Ack Repeated Bit Start from Signal MCM20027 At this point the MCM20027 transitions from a “SLAVE-receiver” “SLAVE- transmitter” MOTOROLA 29 ...
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... C SERIAL INTERFACE TIMING SPECIFICATIONS ImageMOS ImageMOS Figure 19) Min Max Unit 50 400 KHz MCLK MCLK MCLK MCLK MCLK MCLK MCLK - 200 Revision 8 November 2001 : MCM20027 30 ...
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... Internal Timing Control h Register 2 (shr time defini- tion); Table 51 Table 5. Suggested Register Default Value Changes Revision 8 November 2001 : MCM20027 NOTE!! These are only suggested value changes. De- pending on the application, there might exist more or less registers whose default values require modifica- tions. Default ...
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... MOTOROLA SEMICONDUCTOR TECHNICAL DATA 12.0 MCM20027 Utility Programming Registers 12.1 Register Reference Map 2 The I C addressing is broken up into groups of 16 and assigned to a specific digital block. The designated block is responsible for driving the internal control bus, when the assigned range of addresses are present on the internal address bus ...
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... Integration Time MSB Register h 4F Integration Time LSB Register h 50 Virtual Frame Row Depth MSB Register h 51 Virtual Frame Row Depth LSB Register h Revision 8 November 2001 : MCM20027 Register Function Unused Unused Unused Unused Factory Use Only 2 Table Address Assignments (Continued) ImageMOS ImageMOS Defa Ref ...
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... Table 46, page Table 47, page Table 47, page Table 49, page Table 50, page 59 Yes h 0A Table 51, page 60 Yes h 5C Table 52, page 60 Yes h 00 Table 53, page Table 54, page Table 27, page 47 h Revision 8 November 2001 : MCM20027 34 ...
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... SEMICONDUCTOR TECHNICAL DATA 13.0 Detailed Register Block Assignments This section describes in further detail the functional op- eration of the various MCM20027 programmable regis- ters. The registers are subdivided into various blocks for ease of addressability and use (see In each table where a suffix code is used hex binary, and d = decimal ...
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... Table 11. DPGA Color 4 Gain Register ImageMOS ImageMOS Default lsb (0) cg2[2] cg2[1] cg2[0] 001110 ) d -32 Default lsb (0) cg3[2] cg3[1] cg3[0] Reset State xx 001110 ) d -32 Default lsb (0) cg4[2] cg4[1] cg4[0] Reset State xx Revision 8 November 2001 : MCM20027 ...
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... The default line definitions are colors 00 row 1 and for row 2 which supports Bayer pattern as defined in section Revision 8 November 2001 : MCM20027 DPGA Color 4 Gain Code Green of Blue-Green Row cg4[5] cg4[4] cg4[3] = 0-32 ] ---> Gain = 0.6956 + (0.02174* cg4 33-63 ] --> ...
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... Description Table 14. Color Tile Row 2 Definition Register ImageMOS ImageMOS Default lsb (0) r1c2[0] r1c1[1] r1c1[0] Reset State Default lsb (0) r2c2[0] r2c1[1] r2c1[0] Reset State Revision 8 November 2001 : MCM20027 38 ...
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... A 00 nrv register represents output voltage of 0V. The de- fault settings for the two registers produce a 1.9V refer- ence on prv and 0.6V on nrv outputs. When adjusting Revision 8 November 2001 : MCM20027 Color Tile Row 3 Definition Unused r3c3[1] ...
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... Power Configuration Register analog functionality that directly effect power consump- tion of the device. An external precision resistor pin is available on the MCM20027 that may be used to more accurately regulate the internal current sources. This serves to minimize variations in power consumption that are caused by variations in internal resistor values as well as offer a method to reduce the power consumption of the device ...
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... MOTOROLA SEMICONDUCTOR TECHNICAL DATA The MCM20027 is put into a standby mode via the I interface by setting the sby bit of the tion Register. Address 0C h msb ( Bit Function Number 7-5 Unused Unused 4 Prog Bias 0 Gen 1 3 Int/Ext 0 Resistor 1 2 Select 0 Software 1 Clamp 1 Software ...
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... FUO FUO FUO Description Table 21. Tristate Control Register ImageMOS ImageMOS Default lsb (0) sir ssr sit Reset State xxx Default lsb (0) FUO tsctl tspix Reset State 000000 Revision 8 November 2001 : MCM20027 42 ...
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... PGA White 1 Balance 0 1 Col_Dova 1 0 Table 22. Programable Bias Generator Control register Revision 8 November 2001 : MCM20027 Tristate Control FUO FUO FUO Table 21. Tristate Control Register In order for this Register to be used, the pbg bit of the Power Configuration Register; Table 19 abled ...
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... Gain = 1.391+ (0.0434* (gg1 d d Table 23. Exposure PGA Global Gain Register A ImageMOS ImageMOS Default 2 1 wbp cdp Exposure PGA Global Gain Register A; Table Default 2 1 gg1[2] gg1[1] 001110 ) Revision 8 November 2001 : 00 h lsb (0) fcp lsb (0) gg1[0] Reset State xx MCM20027 44 ...
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... Exposure Gain Modes: 1) Raw gain mode - 32 steps @ 0.02174/step - 32 steps @ 0.04340/step Address 22 h msb ( Bit Function Number Revision 8 November 2001 : MCM20027 Exposure PGA Global Gain gg2[5] gg2[4] gg2[3] Description = 0-32 ] ---> Gain = 0.6956 + (0.02174* gg2 33-63 ] --> Gain = 1.391+ (0.0434* (gg2 ...
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... Gain Mode 01 1x 13.3 Offset Calibration Block Offset adjustments for the MCM20027 are done in sep- arate sections of the ASP to facilitate FPN removal and final image black level set. The Column DOVA DC Register; Table set the initial offset of the pixel output in a range that will facilitate per-column offset data generation for varying operational conditions ...
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... Setting the cms bit will stop the current output data stream at the end of the current frame. Unsetting this bit (cms = 0 The MCM20027 is in CFRS in default. The user may use this bit to capture data in the CFRS mode and/or SFRS while using the SYNC pin. The SYNC pin triggers ...
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... The row sub sampling rate is defined by rf[1:0] while the column sub sampling rate is defined by cf[1:0]. The pix- el array is fully sampled in default. ImageMOS ImageMOS Default lsb ( Reset State Revision 8 November 2001 : MCM20027 48 ...
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... STROBE signal is going to be on. If the bit is set to 1 (Setting 1), causes the STROBE Signal from the time all the Rows are integrating to 1 Row time (T ) before Read-Out of the first Row commences. If ROW Revision 8 November 2001 : MCM20027 Sub-sample Control FUO cm ...
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... There is no logic in the sensor to d ImageMOS ImageMOS Default 2 1 lsb ( Reset State (Table 32 and (Table 36 37), indicate the size of the WOI. to 1295 . d d Revision 8 November 2001 : Table to d MCM20027 50 ...
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... WOI Row Pointer wrp[10:0] Address 47 h msb ( Bit Function Number Unused Unused Revision 8 November 2001 : MCM20027 WOI Row Pointer MSB Description Table 32. WOI Row Pointer MSB Register WOI Row Pointer LSB wrp[5] ...
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... ImageMOS ImageMOS Default lsb (0) wrd[10] wrd[9] wrd[8] (Table 35), 011 b Default lsb (0) wrd[2] wrd[1] wrd[0] Reset State (Table 34), 11111111 (1024 rows) Default lsb (0) wcp[10] wcp[9] wcp[8] Reset State xxxxx (Table 000 b Revision 8 November 2001 : MCM20027 b 52 ...
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... Reset State (Table 00001000 (col. 8) Default lsb (0) wcw[10] wcw[9] wcw[8] Reset State xxxxx (Table 39), 100 b Default lsb (0) wcw[2] wcw[1] wcw[0] Reset State (Table 38), 11111111 (1280 col.) Revision 8 November 2001 : b b MCM20027 53 ...
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... Integration Time Integration Time MSB cint[12] cint[11] Description Factory Use Only Table 40. Integration Time MSB Register ImageMOS ImageMOS space.(Table 42, “Virtual Frame Row Depth 56) Default lsb (0) cint[10] cint[9] cint[8] Reset State (Table 41) Register, 000100 Revision 8 November 2001 : MCM20027 54 ...
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... Default lsb (0) cint[2] cint[1] cint[0] Reset State (Table 40) Register, 11111111 CFRS and SFRS: 1280 Rows) Default lsb (0) vrd[10] vrd[9] vrd[8] Reset State xx 000100 Default lsb (0) vrd[2] vrd[1] vrd[0] Reset State Revision 8 November 2001 : b b MCM20027 55 ...
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... ImageMOS ImageMOS Default lsb (0) vrd[2] vrd[1] vrd[0] 00100111 (1064 rows) Default lsb (0) vcw[10] vcw[9] vcw[8] Reset State xx 000101 Default lsb (0) vcw[2] vcw[1] vcw[0] Reset State 00010011 (1300 col.) Revision 8 November 2001 : MCM20027 56 ...
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... SOF & VCLK Register, Table used to de- Default lsb (0) sofd[2] sofd[1] sofd[0] Reset State 1001100b Default lsb (0) vckd[2] vckd[1] vckd[0] Reset State 00000010 Default lsb (0) sofc[2] vckc[1] vckc[0] Reset State 11 b Revision 8 November 2001 : b MCM20027 57 ...
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... Greycode and Readout Control gcr Description ImageMOS ImageMOS Default lsb (0) sofc[2] vckc[1] vckc[ Default lsb (0) gcc rrr rrc Reset State Revision 8 November 2001 : MCM20027 58 ...
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... MCLKs Wide MCLKs Wide MCLKs Wide MCLKs Wide b d ImageMOS ImageMOS Default lsb (0) gcc rrr rrc ,Internal Timing Control Register 2 (shr Default lsb (0) shs[2] shs[1] shs[0] Reset State xx 001010b Revision 8 November 2001 : MCM20027 59 ...
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... HCLK signal. The delay HCLK Control FUO FUO Description Table 52. HCLK Delay Register ImageMOS ImageMOS Default lsb (0) shr[2] shr[1] shr[0] Reset State xx 001010b Default lsb (0) hckd[2] hckd[1] hckd[0] Reset State x Revision 8 November 2001 : MCM20027 60 ...
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... MOTOROLA, INC. 2001 HCLK Control FUO FUO Table 52. HCLK Delay Register allows the user to select how the output pixel data stream is encoded/for- and Figure 14, on page 20) ImageMOS ImageMOS Default lsb (0) hckd[2] hckd[1] hckd[0] 100 b Figure Revision 8 November 2001 : MCM20027 61 ...
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... MOTOROLA, INC. 2001 vcc FUO Description allows the user to define the size of the dark rows to use as Clamping rows. ImageMOS ImageMOS Default lsb (0) FUO FUO FUO Reset State 3FE 0000 b Revision 8 November 2001 : MCM20027 62 ...
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... Defines the first Clamping row. Defines the FRC starting point. Start MOTOROLA, INC. 2001 FRC Definition frcd[0] frcs[3] Description Factory Use Only . d Table 54. FRC Definition Register ImageMOS ImageMOS Default lsb (0) frcs[2] frcs[1] frcs[0] Reset State 0100 Revision 8 November 2001 : MCM20027 63 ...
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... 100 mA -65 to +150 °C 300 °C Min. Max Unit 3.0 3 ° °C . < < out DD referenced 0°C to 40° °C to °C A Min. Max V +0.3 2.0 DD -0.3 0 Revision 8 November 2001 : Unit MCM20027 64 ...
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... Maximum Standby Supply Current DD POWER DISSIPATION (VDD = 3.0V, VDD referenced to VSS 25°C) Symbol Parameter P Standby Power STDBY P Average Power AVG MCM20027 MONOCHROME CMOS IMAGE SENSOR ELECTRO-OPTICAL CHARACTERISTICS Symbol Parameter E Saturation Exposure sat QE Peak Quantum Efficiency (@550nm) PRNU Photoresponse Non-uniformity Notes: 1.For = 550 nm wavelength ...
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... ADC. MOTOROLA, INC. 2001 ) that the device can be exposed to before blooming of the pixel will sat GENERAL Typ 70 50 Analog to Digital Converter (ADC) Min 8 ImageMOS ImageMOS Unit Notes - 1 e rms dB Typ Max Units 10 bits 2.5 Vpp +1.0 LSB +0.5 LSB 13.5 MHz Revision 8 November 2001 : MCM20027 66 ...
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... INIT DVDD D = Digital DVSS A = Analog AVSS AVDD CLRCA See Section 8.4 for more information MOTOROLA, INC. 2001 Top-View Figure 20. MCM20027 Pin Definitions ImageMOS ImageMOS note: pins 1 & 46 should be pulled down when not in use SDATA SCLK DVDD DVSS VSS_PIX Connect to VDD VDD_PIX BIAS_IN AVDD See Section 8 ...
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... PIX_OUT8 Output bit 8 = 256 Weight I 42 PIX_OUT9 Output bit 9 = 512 Weight A 43 MCLK I 44 VCLK 45 HCLK SYNC STROBE I 48 SOF Table 55. MCM20027 Pin Definitions I INPUT P POWER G GROUND O OUTPUT D DIGITAL A ANALOG I/O BIDIRECTIONAL ImageMOS ImageMOS Pin Description Power Type Pixel power Pixel ground ...
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... MOTOROLA SEMICONDUCTOR TECHNICAL DATA 16.0 MCM20027 Packaging Information Figure 21. 48 Terminal ceramic leadless chip carrier (bottom view) Dim Min(Inches) A 0.555 B 0.525 C --- D 0.016 E 0.054 F 0.075 G 0.040 BSC H 0.033 J 0.555 K 0.525 R 0.0075 (Radius) R1 0.0075 (Radius) MOTOROLA, INC. 2001 Max(Inches) 0.572 0.545 0.09362 0.024 ...
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... PIX_OUT1 PIX_OUT2 PIX_OUT0 MOT 30 M SDATA INC SCLK VDD 19 27 VSS 20 26 VSS_PIX 21 25 VDD_PIX BIAS_IN 24 23 VDDA 25 22 VSSA CVBG EXTRESP VSSA K06K VSSA VAGREF Revision 8 November 2001 : MCM20027 ...
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... ImageMOS ImageMOS D English (inches) min max 0.01969 0.02362 0.03900 0.04900 0.02776 0.02933 0.01500 0.01900 0.00050 0.00300 0.00025 0.00200 0.02660 0.04637 0.00692 0.02274 0.04326 0.05133 0.07393 0.09362 0.06700 0.05500 Revision 8 November 2001 : MCM20027 71 ...
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... SEMICONDUCTOR TECHNICAL DATA 17.0 MCM20027 Typical Connection Below you will find a schematic illustrating a typical connection of an MCM20027 CMOS sensor. One can use this as a reference when connecting the sensor with another external device such as an image processor, SDRAM etc.This schematic also illustrates the connection of the required passives on the sensor. ...
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... Motorola, Inc. Motorola, Inc Equal MFax is a trademark of Motorola, Inc. JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan. 81-3-5487-8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 Revision 8 November 2001 : MCM20027 73 ...
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