MCM20027 Motorola, MCM20027 Datasheet - Page 57

• Manufacturer Part Number: MCM20027
• Description: Color SXGA Digital Image Sensor 1280 x 1024 pixel progressive scan solid state image sensor with integrated CDS/PGA/ADC / digital programming / control
• Manufacturer: Motorola

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
The
Register; Table 47
(clock) delay for the start of the two signals respectively.
The SOF Delay is measured as the time after the start
of the change of row address (Change of row address
MOTOROLA, INC. 2001
Address
Address
Address
Number
Number
Number
vckd[7]
sofd[7]
msb (7)
msb (7)
msb (7)
SOF Delay Register; Table 46
7 - 0
7 - 0
3 - 2
54
55
56
Bit
Bit
Bit
x
h
h
h
SOF Delay
SOF Con-
Function
Function
Function
vckd[6]
sofd[6]
VCLK
Delay
are used to determine the time
trol
x
6
6
6
Table 48. SOF & VCLK Signal Length Control Register
Delay= sofd[d] x 0.5 MCLKs
(Note - Delay is relative to Internal Pixel Transfer Control)
Delay = vckd[d] x 0.5 MCLKs
(Note - Delay is relative to Start Of Frame {SOF} signal)
sof[3:2] = 00
sof[3:2] = 01
sof[3:2] = 10
sof[3:2] = 11
vckd[5]
sof[d5]
x
5
5
5
and
SOF and VCLK Signal Length Control
VCLK Delay
Table 47. VCLK Delay Register
Table 46. SOF Delay Register
b
b
b
b
= 1 MCLK Wide
= 8 MCLKs Wide
= 64 MCLKs Wide
= Full Row Wide
vckd[4]
sofd[4]
x
4
4
4
VCLK Delay
SOF Delay
Description
Description
Description
is a parameter that cannot be easily identified by the
common user). The VCLK Delay is defined as the time
after the SOF signal is first initialized. The
Signal Length Control
fine the size of the SOF and VCLK signals. In default,
SOF is one row wide while VLCK is 64 MCLKs wide
vckd[3]
sofd[3]
sofc[3]
3
3
3
vckd[2]
sofd[2]
sofc[2]
2
2
2
Revision 8.0 - 28 November 2001 :
Register,
vckd[1]
vckc[1]
sofd[1]
Table 48
ImageMOS
ImageMOS
1
1
1
, is used to de-
SOF & VCLK
00000010
1001100b
Default
Default
vckd[0]
Default
vckc[0]
sofd[0]
Reset
Reset
Reset
State
State
State
lsb (0)
lsb (0)
lsb (0)
4C
02
11
E
h
h
b
h
b
MCM20027
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