IR3522 International Rectifier, IR3522 Datasheet - Page 10

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IR3522

Manufacturer Part Number
IR3522
Description
DDR & VTT CONTROL IC
Manufacturer
International Rectifier
Datasheet

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PWM Operation
The PWM comparator is located in the phase IC. Upon receiving a clock falling edge and PHSIN high, the PWM
latch is set and the PWM ramp voltage begins to increase and turning off the low side driver The high side driver is
then turned on once GATEL falls below 1.0V (non-overlap time). When the PWM ramp voltage exceeds the error
amplifier’s output voltage, the PWM latch is reset and the internal ramp capacitor is quickly discharged to the output
voltage of share adjust amplifier. And, the ramp will remains discharged until the next clock pulse. This reset turns
off the high side driver and enables the low side driver after the non-overlap time ((GATEH-SW) < 1.0V).
The PWM latch is reset dominant allowing all phases to go to zero duty cycle within a few tens of nanoseconds in
response to a load step decrease. Phases can overlap and go up to 100% duty cycle in response to a load step
increase with turn-on gated by the clock pulses. An error amplifier output voltage greater than the common mode
input range of the PWM comparator results in 100% duty cycle regardless of the voltage of the PWM ramp. This
arrangement guarantees the error amplifier is always in control and can demand 0 to 100% duty cycle as required.
It also favors response to a load step decrease which is appropriate given the low output to input voltage ratio of
most systems. The inductor current will increase much more rapidly than decrease in response to load transients.
This control method is designed to provide “single cycle transient response” where the inductor current changes in
response to load transients within a single switching cycle maximizing the effectiveness of the power train and
minimizing the output capacitor requirements. An additional advantage of this architecture is that differences in
ground or input voltage at the phases have no effect on operation since the PWM ramps are referenced to VDAC.
Figure 5 depicts PWM operating waveforms under various conditions.
Page 10
Control IC CLKOUT
(Phase IC CLKIN)
Control IC PHSOUT
(Phase IC1 PHSIN)
Phase IC1
PWM Latch SET
Phase IC 1 PHSOUT
(Phase IC2 PHSIN)
Phase IC 2 PHSOUT
(Phase IC3 PHSIN)
Phase IC 3 PHSOUT
(Phase IC4 PHSIN)
Phase IC4 PHSOUT
(Control IC PHSIN)
Figure 4 Four Phase Oscillator Waveforms
V3.01
IR3522

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