LTC1415 Linear Technology, LTC1415 Datasheet
LTC1415
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LTC1415 Summary of contents
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... Two power shutdown modes provide flex- ibility for low power systems. The LTC1415’s full-scale input range is 4.096V. Low linearity errors 0.35LSB INL, 0.25LSB DNL make it ideal for imaging systems. Outstanding AC performance includes 72dB S/( and 80dB THD with an input frequency of 100kHz ...
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... Analog Input Voltage (Note 3) ...... – 0. Digital Input Voltage (Note 4) .................. – 0.3V to 12V Digital Output Voltage .................... – 0. Power Dissipation............................................. 500mW Operating Temperature Range LTC1415C............................................... LTC1415I........................................... – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................. 300 VERTER ...
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... OUT DD CS High (Note OUT OUT DD (Note 5) CONDITIONS (Notes 10, 11) CS High SHDN = 0V, NAP/SLP = 5V (Note 12) SHDN = 0V, NAP/SLP = 0V (Note 12) CS High SHDN = 0V, NAP/SLP = 5V SHDN = 0V, NAP/SLP = 0V LTC1415 MIN TYP MAX UNITS – – – – MHz ...
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... LTC1415 CHARACTERISTICS SYMBOL PARAMETER f Maximum Sampling Frequency SAMPLE(MAX) Conversion and Acquisition Time t Conversion Time CONV t Acquisition Time ACQ Setup Time CONVST Setup Time 2 t NAP/SLP to SHDN Setup Time 3 t SHDN to CONVST Wake-Up Time Nap Mode (Note 10) ...
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... SAMPLE f = 86.97509766kHz IN1 f = 113.2202148kHz IN2 2fa + 2fb 3fb 300k 400k 500k FREQUENCY (Hz) LTC1415 • TPC05 Differential Nonlinearity vs Output Code 0 512 1024 1536 2048 2560 3072 3584 4096 OUTPUT CODE LTC1415 • TPC06 2ND 3RD 1M 2M LTC1415 • TPC03 600k 5 ...
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... Tie to 3V for driving 3V logic. DV (Pin 27): 5V Positive Supply. Short to Pin 28 (Pin 28): 5V Positive Supply. Bypass to AGND DD with 10 F tantalum in parallel with 0 ceramic. Input Common Mode Rejection vs Input Frequency 10k 100k 1M 2M INPUT FREQUENCY (Hz) LTC1415 • TPC09 ...
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... SAMPLE 12-BIT CAPACITIVE DAC SUCCESSIVE APPROXIMATION REGISTER INTERNAL CONTROL LOGIC CLOCK NAP/SLP SHDN CONVST DBN C L (B) Hi AND 1415 TC01 LTC1415 ZEROING SWITCHES + COMP – D11 • OUTPUT LATCHES • • D0 OGND CS BUSY 1415 BD ...
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... A the 12-bit output latches. DYNAMIC PERFORMANCE The LTC1415 has excellent high speed sampling capabil- ity. FFT (Fast Fourier Transform) test techniques are used to test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using a FFT algo- rithm, the ADC’ ...
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... S/( the equation [S/( – 1.76]/6.02 where N is the effective number of bits of resolution and S/( expressed in dB. At the maximum sampling rate of 1.25MHz the LTC1415 maintains very good ENOBs up to the Nyquist input frequency of 625kHz (refer to Figure 3). Total Harmonic Distortion Total Harmonic Distortion (THD) is the ratio of the RMS sum of all harmonics of the input signal to the fundamental itself ...
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... IN provided by increasing the time between conversions. The best choice for an op amp to drive the LTC1415 will depend on the application. Generally applications fall into two categories: AC applications where dynamic specifi- cations are most critical and time domain applications where DC accuracy and settling time are most critical ...
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... ANALOG INPUT Input Range The 4.096V input range of the LTC1415 is optimized for low noise. Most single supply op amps also perform well over this same range, allowing direct coupling to the analog inputs and eliminating the need for special transla- tion circuitry ...
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... Figure 9. This is useful in applications where the peak input signal amplitude may vary. The input span of the ADC can then be adjusted to match the peak input signal, maximizing the signal-to-noise ratio. The filtering of the internal LTC1415 reference amplifier will limit the ...
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... This circuit has the lowest noise (SINAD = 72dB to 100kHz) but will have distortion 1M 2M LTC1415 • F10a Figure 10b. Shifting the Input Range Up from Ground by 200mV ANALOG INPUT 4.096V LTC1415 LTC1415 • ...
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... SINAD at low frequencies (SINAD = 70dB at 100kHz). Full-Scale and Offset Adjustment Figure 11a shows the ideal input/output characteristics for the LTC1415. The code transitions occur midway between successive integer LSB values (i.e., 0.5LSB, 1.5LSB, 2.5LSB,... FS – 1.5LSB, FS – 0.5LSB). The output is straight binary with 1LSB = FS/4096 = 4.096V/4096 = 1mV ...
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... ADC data bus. The traces connecting the pins and bypass capacitors must be kept short and should be made as wide as possible. The LTC1415 has differential inputs to minimize noise coupling. Common mode noise on the + A leads will be rejected by the input CMRR. The – A ...
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... LTC1415 U U APPLICATIONS INFORMATION ...
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... U U APPLICATIONS INFORMATION Figure 13b. Suggested Evaluation Circuit Board Component Side Silkscreen Figure 13c. Suggested Evaluation Circuit Board Component Side Layout W U LTC1415 17 ...
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... The guaranteed maximum acquisition time is 150ns. In addition, a throughput time of 800ns and a minimum sampling rate of 1.25Msps are guaranteed. Power Shutdown The LTC1415 provides two power shutdown modes, Nap and Sleep, to save power during inactive periods. The Nap mode reduces the power by 87% and leaves only the digital logic and reference powered up ...
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... After the conversion is complete, the processor can read the new result and initiate another conversion. CONVST t CONV DATA (N – 1) DATA N DB11 TO DB0 DB11 TO DB0 LTC1415 1415 • F15 Figure 15 CONVST Setup Timing DATA ( DB11 TO DB0 1415 • F16 19 ...
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... LTC1415 PPLICATI S I FOR ATIO CONVST BUSY DATA Figure 17. Mode 1b CONVST Starts a Conversion. Data is Read by RD CONVST t 6 BUSY RD DATA Figure 18. Mode 2 CONVST Starts a Conversion. Data is Read CONV DATA (N – 1) DATA N DB11 TO DB0 ...
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... DATA CONV DATA N DB11 TO DB0 Figure 19. Slow Memory Mode Timing t t CONV DATA (N – 1) DB11 TO DB0 Figure 20. ROM Mode Timing LTC1415 DATA N DATA ( DB11 TO DB0 DB11-DB0 1415 • F19 DATA N DB11 TO DB0 1415 • F20 21 ...
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... LTC1415 PACKAGE DESCRIPTIO 0.205 – 0.212** (5.20 – 5.38) 0.005 – 0.009 0.022 – 0.037 (0.13 – 0.22) (0.55 – 0.95) * DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE ...
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... NOTE 0.093 – 0.104 (2.362 – 2.642) 0 – 8 TYP 0.050 (1.270) TYP 0.014 – 0.019 (0.356 – 0.482) TYP LTC1415 0.697 – 0.712* (17.70 – 18.08 0.394 – 0.419 (10.007 – 10.643 ...
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... LTC1415 RELATED PARTS PART NUMBER DESCRIPTION LTC1273/75/76 Complete 5V Sampling 12-Bit ADCs with 70dB SINAD at Nyquist LTC1274/77 Low Power 12-Bit ADCs with Nap and Sleep Mode Shutdown LTC1278/79 High Speed Sampling 12-Bit ADCs with Shutdown LTC1282 Complete 3V 12-Bit ADC with 12mW Power Dissipation ...