LTC2283 Linear Technology, LTC2283 Datasheet - Page 9

• Manufacturer Part Number: LTC2283
• Description: 125Msps Low Power 3V ADC
• Manufacturer: Linear Technology

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PIN FUNCTIONS
OEA (Pin 58): Channel A Output Enable Pin. Refer to
SHDNA pin function.
SHDNA (Pin 59): Channel A Shutdown Mode Selection
Pin. Connecting SHDNA to GND and OEA to GND results
in normal operation with the outputs enabled. Connecting
SHDNA to GND and OEA to V
with the outputs at high impedance. Connecting SHDNA
to V
outputs at high impedance. Connecting SHDNA to V
and OEA to V
at high impedance.
MODE (Pin 60): Output Format and Clock Duty Cycle
Stabilizer Selection Pin. Note that MODE controls both
channels. Connecting MODE to GND selects offset binary
output format and turns the clock duty cycle stabilizer off.
1/3 V
FUNCTIONAL BLOCK DIAGRAM
DD
DD
SENSE
and OEA to GND results in nap mode with the
2.2μF
selects offset binary output format and turns the
A
A
V
IN
IN
CM
+
–
DD
INPUT
REFERENCE
S/H
SELECT
RANGE
1.5V
results in sleep mode with the outputs
REF
BUF
FIRST PIPELINED
ADC STAGE
DD
Figure 1. Functional Block Diagram (Only One Channel is Shown)
results in normal operation
DIFF
AMP
SECOND PIPELINED
REF
ADC STAGE
1μF
REFH
REFH
0.1μF
2.2μF
REFL
THIRD PIPELINED
REFL
ADC STAGE
1μF
DD
INTERNAL CLOCK SIGNALS
CLOCK/DUTY
clock duty cycle stabilizer on. 2/3 V
ment output format and turns the clock duty cycle stabilizer
on. V
the clock duty cycle stabilizer off.
V
Mode Bias. Bypass to ground with 2.2μF ceramic chip
capacitor. Do not connect to V
SENSEA (Pin 62): Channel A Reference Programming Pin.
Connecting SENSEA to V
and a ±0.5V input range. V
and a ±1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEA selects an input
range of ±V
GND (Exposed Pad) (Pin 65): ADC Power Ground. The
Exposed Pad on the bottom of the package needs to be
soldered to ground.
CONTROL
CYCLE
CMA
CLK
FOURTH PIPELINED
DD
(Pin 61): Channel A 1.5V Output and Input Common
ADC STAGE
selects 2’s complement output format and turns
MODE
SENSEA
*OF AND CLKOUT ARE SHARED BETWEEN BOTH CHANNELS.
CONTROL
LOGIC
SHDN
FIFTH PIPELINED
. ±1V is the largest valid input range.
ADC STAGE
OE
CMA
DD
selects the internal reference
selects the internal reference
CMB
AND CORRECTION
SHIFT REGISTER
SIXTH PIPELINED
DRIVERS
OUTPUT
ADC STAGE
.
OGND
DD
selects 2’s comple-
LTC2283
2283 F01
•
•
•
OF*
D11
D0
CLKOUT*
OV
DD
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