LTC2309 Linear Technology Corporation, LTC2309 Datasheet - Page 7

• Manufacturer Part Number: LTC2309
• Description: 12-Bit SAR ADC
• Manufacturer: Linear Technology Corporation

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PIN FUNCTIONS
CH3-CH7 (Pins 1-5): Channel 3 to Channel 7 Analog
Inputs. CH3-CH7 can be confi gured as single-ended
or differential input channels. See the Analog Input
Multiplexer section.
COM (Pin 6): Common Input. This is the reference
point for all single-ended inputs. It must be free of
noise and should be connected to ground for unipolar
conversions and midway between GND and REFCOMP
for bipolar conversions.
V
with a minimum 2.2μF tantalum capacitor or low ESR
ceramic capacitor. The internal reference may be over-
driven by an external 2.5V reference at this pin.
REFCOMP (Pin 8): Reference Buffer Output. Bypass to
GND with a 10μF tantalum and 0.1μF ceramic capaci-
tor in parallel. Nominal output voltage is 4.096V. The
internal reference buffer driving this pin is disabled by
grounding V
by an external source.
GND (Pins 9-11, Pins 18-20): Ground. All GND pins
must be connected to a solid ground plane.
AV
AV
ceramic and a 10μF tantalum capacitor in parallel.
AD0 (Pin 14): Chip Address Control Pin. This pin is
confi gured as a three-state (Low, High, Floating) address
control bit for the device I
address selection.
REF
DD
DD
(Pin 7): 2.5V Reference Output. Bypass to GND
is 4.75V to 5.25V. Bypass AV
(Pins 12, 13): 5V Analog Supply. The range of
REF
, allowing REFCOMP to be overdriven
2
C address. See Table 2 for
DD
to GND with a 0.1μF
AD1 (Pin 15): Chip Address Control Pin. This pin
is confi gured as a three-state (Low, High, Floating)
address control bit for the device I
Table 2 for address selection.
SCL (Pin 16): Serial Clock Pin of the I
LTC2309 can only act as a slave and the SCL pin only
accepts an external serial clock. Data is shifted into
the SDA pin on the rising edges of the SCL clock and
output through the SDA pin on the falling edges of the
SCL clock.
SDA (Pin 17): Bidirectional Serial Data Line of the I
Interface. In transmitter mode (Read), the conversion
result is output at the SDA pin, while in receiver mode
(Write), the D
fi gure the ADC. The pin is high impedance during the
data input mode and is an open-drain output (requires
an appropriate pull-up device to V
output mode.
DV
is 4.75V to 5.25V. Bypass DV
ceramic and a 10μF tantalum capacitor in parallel.
CH0-CH2 (Pins 22-24): Channel 0 to Channel 2 Analog
Inputs. CH0-CH2 can be confi gured as single-ended
or differential input channels. See the Analog Input
Multiplexer section.
GND (Pin 25): Exposed Pad Ground. Must be soldered
directly to ground plane.
DD
(Pin 21): 5V Digital Supply. The range of DV
IN
word is input at the SDA pin to con-
DD
to GND with a 0.1μF
CC
) during the data
2
2
LTC2309
C address. See
C Interface. The
7
2309f
DD
2
C