LTC2362 Linear Technology, LTC2362 Datasheet - Page 5

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LTC2362

Manufacturer Part Number
LTC2362
Description
(LTC2360 - LTC2362) 12-Bit Serial ADCs
Manufacturer
Linear Technology
Datasheet

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Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: When pins A
they will be clamped by internal diodes. These products can handle input
currents greater than 100mA below GND or above V
Note 4: V
f
Note 5: Integral linearity is defi ned as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
TIMING CHARACTERISTICS
SYMBOL
f
f
t
t
t
t
t
t
t
t
t
t
t
t
range, otherwise specifi cations are at T
SMPL(MAX)
SCK
SCK
THROUGHPUT
ACQ
CONV
1
2
3
4
5
6
7
8
SCK
= f
SCK(MAX)
DD
= OV
PARAMETER
Maximum Sampling Frequency
Shift Clock Frequency
Shift Clock Period
Minimum Throughput Time, t
Acquisition Time
Conversion Time
Minimum Positive CONV Pulse Width
SCK↑ Setup Time After CONV↓
SDO Enabled Time After CONV↓
SDO Data Valid Access Time After SCK↓ (Notes 8, 9, 10)
SCK Low Time
SCK High Time
SDO Data Valid Hold Time After SCK↓
SDO Into Hi-Z State Time After CONV↑
unless otherwise specifi ed.
DD
= V
IN
and V
REF
= 2.35V to 3.6V, f
REF
are taken below GND or above V
ACQ
SMPL
A
= 25°C. (Note 4)
+ t
= f
CONV
DD
SMPL(MAX)
without latch-up.
CONDITIONS
(Notes 8, 9)
(Notes 8, 9)
(Note 8)
(Note 8)
(Notes 8, 9)
(Note 11)
(Note 11)
(Notes 8, 9, 10)
(Notes 8, 9)
The
and
l
DD
denotes the specifi cations which apply over the full operating temperature
,
l
l
l
l
l
l
l
l
l
l
l
l
l
40%
40%
MIN
100
100
16
2
8
8
4
Note 6: Linearity, offset and gain specifi cations apply for a single-ended
A
Note 7: Typical RMS noise at code transitions.
Note 8: Guaranteed by characterization. All input signals are specifi ed with
t
Note 9: All timing specifi cations given are with a 10pF capacitance load.
With a capacitance load greater than this value, a digital buffer or latch
must be used.
Note 10: The time required for the output to cross the V
Note 11: Guaranteed by design, not subject to test.
Note 12: High temperatures degrade operating lifetimes. Operating lifetime
is derated at temperatures greater than 105°C.
r
LTC2360/LTC2361/LTC2362
IN
= t
input with respect to GND.
LTC2360
f
= 2ns (10% to 90% of V
TYP
6
MAX
10
10
16
8
40%
40%
MIN
250
40
16
1
3
3
4
LTC2361
TYP
DD
6
) and timed from a voltage level of 1.6V.
MAX
25
16
4
8
40%
40%
MIN
500
0.5
1.5
1.5
20
16
4
LTC2362
TYP
6
IH
or V
MAX
50
16
2
8
IL
voltage.
UNITS
236012f
5
MHz
t
t
kHz
SCK
SCK
ns
μs
μs
μs
μs
ns
ns
ns
ns
ns

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