LTC2424 Linear Technology, LTC2424 Datasheet - Page 12

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LTC2424

Manufacturer Part Number
LTC2424
Description
4-/8-Channel 20-Bit uPower No Latency ADCs
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
LTC2424/LTC2428
during the conversion state, the result of the conversion in
progress may be outside specifications but the following
conversions will not be affected.
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2424/
LTC2428 can operate with an external conversion clock.
The converter automatically detects the presence of an
external clock signal at the F
oscillator. The frequency f
be at least 2560Hz (1Hz notch frequency) to be detected.
The external clock signal duty cycle is not significant as
long as the minimum and maximum specifications for the
high and low periods t
While operating with an external conversion clock of a
frequency f
than 110dB normal mode rejection in a frequency range
f
rejection as a function of the input frequency deviation
from f
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator
and enters the Internal Conversion Clock mode. The
LTC2424/LTC2428 operation will not be disturbed if the
change of conversion clock source occurs during the
sleep state or during the data output state while the
Table 4. LTC2424/LTC2428 State Duration
State
CONVERT
SLEEP
DATA OUTPUT
MAXIMUM OUTPUT
WORD RATE (OWR)
12
EOSC
/2560 4% and its harmonics. The normal mode
EOSC
/2560 is shown in Figure 5.
EOSC
, the LTC2424/LTC2428 provide better
Operating Mode
Internal Oscillator
External Oscillator
Internal Serial Clock
External Serial Clock with
Frequency f
U
HEO
INFORMATION
EOSC
SCK
U
and t
O
kHz
pin and turns off the internal
of the external signal must
LEO
W
are observed.
F
F
F
with Frequency f
(f
F
(Internal Oscillator)
F
Frequency f
O
O
O
O
O
EOSC
= LOW (60Hz Rejection)
= HIGH (50Hz Rejection)
= External Oscillator
= LOW/HIGH
= External Oscillator with
/2560 Rejection)
U
O
pin the
EOSC
EOSC
kHz
kHz
converter uses an external serial clock. If the change
occurs during the conversion state, the result of the
conversion in progress may be outside specifications but
the following conversions will not be affected. If the
change occurs during the data output state and the
converter is in the Internal SCK mode, the serial clock duty
cycle may be affected but the serial data stream will
remain valid.
Table 4 summarizes the duration of each state as a
function of F
Figure 5. LTC2424/LTC2428 Normal Mode Rejection When
Using an External Oscillator of Frequency f
INPUT FREQUENCY DEVIATION FROM NOTCH FREQUENCY (%)
Duration
133ms
160ms
20480/f
As Long As CSADC = HIGH Until CSADC = 0 and SCK
As Long As CSADC = LOW But Not Longer Than 1.67ms
(32 SCK cycles)
As Long As CSADC = LOW But Not Longer Than 256/f
(32 SCK cycles)
As Long As CSADC = LOW But Not Longer Than 32/f
(32 SCK cycles)
OWR
–100
–110
–120
–130
–140
–60
–70
–80
–90
–12
O
.
EOSC
t
CONVERT
–8
(In Seconds)
–4
1
t
DATAOUTPUT
0
4
in Hz
8
24248 F05
EOSC
12
SCK
EOSC
ms
ms

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