LTC3412A Linear Technology, LTC3412A Datasheet - Page 14

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LTC3412A

Manufacturer Part Number
LTC3412A
Description
3A/ 4MHz/ Monolithic Synchronous Step-Down Regulator
Manufacturer
Linear Technology
Datasheet

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LTC3412A
APPLICATIO S I FOR ATIO
14
When a load step occurs, V
amount equal to ΔI
series resistance of C
discharge C
the regulator to return V
this recovery time, V
or ringing that would indicate a stability problem. The I
pin external components and output capacitor shown in
Figure 1 will provide adequate compensation for most
applications.
Design Example
As a design example, consider using the LTC3412A in an
application with the following specifi cations:
I
Because effi ciency is important at both high and low load
current, Burst Mode operation will be utilized.
First, calculate the timing resistor:
Use a standard value of 294k. Next, calculate the inductor
value for about 40% ripple current at maximum V
Using a 0.47μH inductor results in a maximum ripple
current of:
C
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, two
100μF ceramic capacitors will be used.
C
OUT(MIN)
OUT
IN
V
I
R
L =
RMS
IN
should be sized for a maximum current rating of:
OSC
I
L
will be selected based on the ESR that is required to
= 3.3V, V
=
(1MHz)(1.2A)
= (3A)
=
= 100mA, f = 1MHz.
(1MHz)(0.47μH)
3 08 10
OUT
.
2.5V
1 10
OUT
generating a feedback error signal used by
2.5V
2.5V
3.3V
6
U
LOAD(ESR)
= 2.5V, I
11
OUT
OUT
OUT
. ΔI
can be monitored for overshoot
10
1–
3.3V
2.5V
U
to its steady-state value. During
k
LOAD
OUT(MAX)
OUT
, where ESR is the effective
2.5V
3.3V
=
1–
– 1= 1.29A
298
immediately shifts by an
also begins to charge or
2.5V
3.3V
W
k
= 0.51μH
= 3A,
= 1.29A
RMS
U
IN
:
TH
Decoupling the PV
tors is adequate for most applications.
The burst clamp and output voltage can now be pro-
grammed by choosing the values of R1, R2, and R3. The
voltage on pin MODE will be set to 0.50V by the resistor
divider consisting of R2 and R3. According to the graph
of Minimum Peak Inductor Current vs Burst Clamp Volt-
age in the Typical Performance Characteristics section, a
burst clamp voltage of 0.5V will set the minimum inductor
current, I
If we set the sum of R2 and R3 to 185k, then the following
equations can be solved:
The two equations shown above result in the following
values for R2 and R3: R2 = 69.8k , R3 = 115k. The value
of R1 can now be determined by solving the following
equation.
A value of 392k will be selected for R1. Figure 4 shows
the complete schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3412A. Check the following in your layout:
1. A ground plane is recommended. If a ground plane
layer is not used, the signal and power grounds should
be segregated with all small signal components returning
to the SGND pin at one point which is then connected to
the PGND pin close to the LTC3412A.
2. Connect the (+) terminal of the input capacitor(s), C
close as possible to the PV
the AC current into the internal power MOSFETs.
R
1
1
R
+
2
+
1 392
=
+
R
R
185
R
2
3
R
BURST
1
3 185
=
k
=
k
=
0 50
0 8
.
, to approximately 1.1A.
.
2 5
0 8
.
.
V
V
k
V
V
IN
and SV
IN
IN
pin. This capacitor provides
pins with two 22μF capaci-
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IN
3412afc
, as

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