LTC3552-1 Linear Technology, LTC3552-1 Datasheet - Page 14

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LTC3552-1

Manufacturer Part Number
LTC3552-1
Description
Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter
Manufacturer
Linear Technology
Datasheet
www.DataSheet4U.com
LTC3552-1
APPLICATIO S I FOR ATIO
Output Capacitor (C
The selection of C
minimize ripple voltage and load step transients. Typically,
once the ESR requirement is satisfi ed, the capacitance
is adequate for fi ltering. The output ripple (ΔV
determined by
where f
and ΔI
is highest at maximum input voltage since ΔI
with input voltage. With ΔI
ripple will be less than 100mV at maximum V
2.25MHz with ESR
Once the ESR requirements for C
RMS current rating generally far exceeds the I
requirement, except for an all ceramic solution. In surface
mount applications, multiple capacitors may have to be
paralleled to meet the capacitance, ESR or RMS cur-
rent handling requirement of the application. Aluminum
electrolytic, special polymer, ceramic and solid tantalum
capacitors are all available in surface mount packages.
The OSCON semiconductor dielectric capacitor avail-
able from Sanyo has the lowest ESR (size) product of
any aluminum electrolytic at a somewhat higher price.
Special polymer capacitors, such as Sanyo POSCAP,
Panasonic Special Polymer (SP), and Kemet A700, of-
fer very low ESR, but have a lower capacitance density
than other types. Tantalum capacitors have the highest
capacitance density, but they have a higher ESR and it
is critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Aluminum electrolytic
capacitors have a signifi cantly higher ESR, and are often
used in extremely cost-sensitive applications provided that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have the lowest ESR
and cost, but also have the lowest capacitance density,
a high voltage and temperature coeffi cient, and exhibit
audible piezoelectric effects. In addition, the high Q of
ceramic capacitors along with trace inductance can lead
to signifi cant ringing. In most cases, 0.1µF to 1µF of X5R
dielectric ceramic capacitors should also be placed close
14
V
OUT
L
O
= ripple current in the inductor. The output ripple
= operating frequency, C
≈ ∆
I ESR
L
⎝ ⎜
OUT
COUT
U
OUT
+
is driven by the required ESR to
) Selection
< 150mΩ.
8
U
f C
O OUT
L
1
= 0.3 • I
OUT
OUT
⎠ ⎟
W
= output capacitance
OUT(MAX)
have been met, the
L
CC
RIPPLE(P-P)
the output
U
increases
and f
OUT
) is
O
=
to the LTC3552-1 in parallel with the main capacitors for
high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. These are tempting
for switching regulator use because of their very low ESR.
Unfortunately, the ESR is so low that it can cause loop
stability problems. Solid tantalum capacitor ESR generates
a loop “zero” at 5kHz to 50kHz that is instrumental in giving
acceptable loop phase margin. Ceramic capacitors remain
capacitive to beyond 300kHz and usually resonate with their
ESL before ESR becomes effective. Also, ceramic caps are
prone to temperature effects which requires the designer
to check loop stability over the operating temperature
range. To minimize their high temperature and voltage
coeffi cients, only X5R or X7R ceramic capacitors should
be used. A good selection of ceramic capacitors is available
from Taiyo Yuden, AVX, Kemet, TDK, and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is very low, the input
and output capacitor must instead fulfi ll a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and
the output capacitor size. Typically, 3-4 cycles are required
to respond to a load step, but only in the fi rst cycle does
the output drop linearly. The output droop, V
usually about 2-3 times the linear drop of the fi rst cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
More capacitance may be required depending on the duty
cycle and load step requirements. In most applications,
C
OUT
2 5 .
⎝ ⎜
f
O
V
I
OUT
DROOP
CC
⎠ ⎟
pin. At best, this ringing can
DROOP
35521f
, is

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