LTC3552-1 Linear Technology, LTC3552-1 Datasheet - Page 15

• Manufacturer Part Number: LTC3552-1
• Description: Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter
• Manufacturer: Linear Technology

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the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 10µF ceramic capacitor is usually enough
for these conditions.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
resistance of C
charge C
regulator to return V
this recovery time, V
or ringing that would indicate a stability problem.
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance. A feedforward
capacitor, C
frequency response. Capacitor C
creating a high frequency zero with R1, which improves the
phase margin. For a detailed explanation of optimizing the
compensation components, including a review of control
loop theory, refer to Application Note 76.
In some applications, a more severe transient can be caused
by switching loads with large (>1µF) input capacitors. The
discharged load input capacitors are effectively put in par-
allel with C
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the load
switch driver. A Hot Swap
for this purpose and usually incorporates current limiting,
short-circuit protection, and soft-start.
Effi ciency Considerations
The effi ciency of a switching regulator is equal to the
output power divided by the input power times 100%. It
is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
APPLICATIO S I FOR ATIO
% Effi ciency = 100% – (L1 + L2 + L3 + ...)
OUT
OUT
LOAD
, generating a feedback error signal used by the
FF
, is added externally to improve the high
, causing a rapid drop in V
OUT
• ESR, where ESR is the effective series
. ΔI
U
OUT
OUT
OUT
LOAD
™
immediately shifts by an amount
to its steady-state value. During
can be monitored for overshoot
controller is designed specifi cally
U
also begins to charge or dis-
FF
provides phase lead by
W
OUT
. No regulator
U
Hot Swap is a trademark of Linear Technology Corporation.
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3552-1 circuits: 1) V
switching losses, 3) I
1) The V
2) The switching current is the sum of the MOSFET driver
3) I
4) Other “hidden” losses such as copper trace and internal
Electrical Characteristics which excludes MOSFET dri-
ver and control currents. V
(< 0.1%) loss that increases with V
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V
out of V
current. In continuous mode, I
where Q
and bottom MOSFET switches. The gate charge losses
are proportional to V
more pronounced at higher supply voltages.
of the internal switches, R
R
fl ows through inductor L, but is “chopped” between
the internal top and bottom switches. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(D) as follows:
The R
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
battery resistances can account for additional effi ciency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C
2
L
R losses are calculated from the DC resistances
. In continuous mode, the average output current
R
I
2
SW
R losses = I
DS(ON)
CC
CC
CC
= (R
T
current is the DC supply current given in the
and Q
to ground. The resulting dQ/dt is a current
that is typically much larger than the DC bias
DS(ON)TOP
for both the top and bottom MOSFETs can be
B
OUT
are the gate charges of the internal top
2
2
R losses, 4) other losses.
(R
CC
)(D) + (R
SW
and thus their effects will be
2
R losses:
CC
+ R
SW
DS(ON)
current results in a small
, and external inductor,
L
CC
DS(ON)BOT
GATECHG
)
LTC3552-1
quiescent current, 2)
CC
and the duty cycle
, even at no load.
IN
= f
)(1 – D)
has adequate
O
(Q
T
15
+ Q
35521f
B
),