LTC3589 Linear Technology, LTC3589 Datasheet - Page 28

• Manufacturer Part Number: LTC3589
• Description: 8-Output Regulator
• Manufacturer: Linear Technology

OPERATION
LTC3589
Power-Up Using the Pushbutton
When in the POFF state, the LTC3589 is in complete
shutdown except the always active LDO1 and regulators
enabled with the keep-alive control bits. Pull the ON pin to
ground with a pushbutton for 400ms to begin a power-up
sequence with the WAKE pin tied to an enable pin. Drive
PWR_ON high within fi ve seconds to signal the LTC3589
to remain in the power-on state.
Power-Down Using the Pushbutton
The pushbutton power-down operation is performed by
the system microprocessor by monitoring the PBSTAT pin.
Once in the PON state, the system controller is responsible
for deciding what action to take with a pushbutton event.
When the ON pin is held LOW for a 50ms debounce period,
the PBSTAT pin is pulled LOW. The system controller should
monitor the PBSTAT pin to determine the pushbutton has
been pushed. If the controller decides that a power down
is desired, then it should drive the PWR_ON pin LOW.
Power-Up and Down Using PWR_ON Pin
An alternate power-up method is to drive the PWR_ON pin
to a HIGH state. After a delay of 50ms from the PWR_ON
signal, the WAKE pin will pull HIGH to drive regulator en-
able pins. When PWR_ON is HIGH for fi ve seconds, the
sequence controller will enter the PON state. To power
down, drive the PWR_ON pin LOW. WAKE will pull down
50ms later.
28
PWR_ON
PWR_ON
PBSTAT
ON(PB)
PBSTAT
ON(PB)
WAKE
WAKE
Figure 7. Power Down Using Pushbutton
Figure 6. Power-Up Using the Pushbutton
50ms
400ms
μC/μP CONTROL
μC/μP CONTROL
<5 SEC
<5 SEC
50ms
3589 F07
3589 F06
Hard Reset Using the Pushbutton
When the ON pin is pulled LOW for fi ve seconds, a hard
reset is initiated. At the end of fi ve seconds, WAKE is
pulled LOW, the I
states, enable pin states are ignored, and the one second
power-down timer is started. During the power-down time,
the enables continue to be ignored to allow the regulator
outputs to discharge. The RSTO pin is pulled LOW for
the power-down time to indicate a pushbutton hard reset
occurred. If the PWR_ON pin is LOW at the end of the one
second power-down time, the LTC3589 will remain in sleep
mode. If PWR_ON is HIGH at the end of one second and
there are no fault conditions, the LTC3589 will power-up
in the same way shown in Figure 8.
Hard Reset Due to a Fault Condition
A hard reset due to V
of an output rail, or an over temperature condition initiates
a hard shutdown of the LTC3589. When the fault occurs,
wake is pulled LOW, the I
to POR states, enable pin inputs are ignored, and the one
second power down timer is started. During the power-
down time, the enables continue to be ignored to allow the
PWR_ON
PBSTAT
ON(PB)
PWR_ON
WAKE
RSTO
PBSTAT
ON(PB)
WAKE
Figure 8. Power-Up and Down Using PWR_ON Pin
Figure 9. Hard Reset Using the Pushbutton
50ms
2
C command registers are reset to POR
IN
μC/μP CONTROL
50ms
μC/μP CONTROL
undervoltage, extended undervoltage
5 SEC
2
C command registers are reset
5 SEC
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50ms
1 SEC
3589 F08
3589 F09
3589p