LTC3834 Linear Technology, LTC3834 Datasheet - Page 23

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LTC3834

Manufacturer Part Number
LTC3834
Description
Synchronous Step-Down Controller
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 9. The Figure 10 illustrates the
current waveforms present in the various branches of the
synchronous regulator operating in the continuous mode.
Check the following in your layout:
1. Is the top N-channel MOSFET M1 located within 1cm
2. Are the signal and power grounds kept separate? The
3. Does the LTC3834 V
4. Are the SENSE
5. Is the INTV
6. Keep the switching node (SW), top gate node (TG), and
of C
combined IC signal ground pin and the ground return
of C
minals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop described above.
the (+) terminals of C
connected between the (+) terminal of C
ground. The feedback resistor connections should not
be along the high current input feeds from the input
capacitor(s).
minimum PC trace spacing? The fi lter capacitor between
SENSE
to the IC. Ensure accurate current sensing with Kelvin
connections at the SENSE resistor.
the IC, between the INTV
This capacitor carries the MOSFET drivers current peaks.
An additional 1μF ceramic capacitor placed immediately
next to the INTV
noise performance substantially.
boost node (BOOST) away from sensitive small-signal
nodes. All of these nodes have very large and fast mov-
ing signals and therefore should be kept on the “output
IN
INTVCC
?
+
and SENSE
CC
must return to the combined C
decoupling capacitor connected close to
and SENSE
CC
and PGND pins can help improve
FB
OUT
should be as close as possible
pin resistive divider connect to
CC
? The resistive divider must be
IN
and the power ground pins?
capacitor should have short
+
leads routed together with
OUT
OUT
and signal
(–) ter-
7. Use a modifi ed “star ground” technique: a low imped-
PC Board Layout Debugging
It is helpful to use a DC-50MHz current probe to monitor
the current in the inductor while testing the circuit. Monitor
the output switching node (SW pin) to synchronize the
oscilloscope to the internal oscillator and probe the actual
output voltage as well. Check for proper performance over
the operating voltage and current range expected in the
application. The frequency of operation should be main-
tained over the input voltage range down to dropout and
until the output load drops below the low current opera-
tion threshold—typically 10% of the maximum designed
current level in Burst Mode operation.
The duty cycle percentage should be maintained from cycle
to cycle in a well-designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required.
Reduce V
of the regulator in dropout. Check the operation of the
undervoltage lockout circuit by further lowering V
monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
side” of the LTC3834 and occupy minimum PC trace
area.
ance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTV
decoupling capacitor, the bottom of the voltage feedback
resistive divider and the SGND pin of the IC.
IN
from its nominal level to verify operation
LTC3834
IN
23
while
3834fb
CC

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