LTC3858 Linear Technology, LTC3858 Datasheet - Page 24

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LTC3858

Manufacturer Part Number
LTC3858
Description
Synchronous Step-Down Controller
Manufacturer
Linear Technology
Datasheet

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Minimum On-Time Considerations
Minimum on-time, t
that the LTC3858 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3858 is approximately
95ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases up to about 130ns.
This is of particular concern in forced continuous applica-
tions with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
a significant amount of cycle skipping can occur with cor-
respondingly larger current and voltage ripple.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3858 circuits: 1) IC V
regulator current, 3) I
transition losses.
LTC3858

applicaTions inForMaTion
t
ON MIN
(
)
<
V
V
IN
OUT
( )
f
ON(MIN)
2
R losses, 4) topside MOSFET
, is the smallest time duration
IN
current, 2) INTV
CC
1. The V
2. INTV
Supplying INTV
3. I
in the Electrical Characteristics table, which excludes
MOSFET driver and control currents. V
cally results in a small (<0.1%) loss.
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched
from low to high to low again, a packet of charge, dQ,
moves from INTV
a current out of INTV
than the control circuit current. In continuous mode,
I
charges of the topside and bottom side MOSFETs.
through EXTV
for the driver and control circuits by a factor of (Duty
Cycle)/(Efficiency). For example, in a 20V to 5V applica-
tion, 10mA of INTV
2.5mA of V
from 10% or more (if the driver was powered directly
from V
fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current flows through L and
R
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
of one MOSFET can simply be summed with the resis-
tances of L, R
example, if each R
= 10mΩ and R
output capacitance losses), then the total resistance
is 130mΩ. This results in losses ranging from 3% to
13% as the output current increases from 1A to 5A for
a 5V output, or a 4% to 20% loss for a 3.3V output.
Efficiency varies as the inverse square of V
same external components and output power level. The
GATECHG
2
SENSE
R losses are predicted from the DC resistances of the
CC
IN
IN
, but is “chopped” between the topside MOSFET
current is the sum of the MOSFET driver and
current is the DC input supply current given
) to only a few percent.
= f(Q
IN
current. This reduces the midcurrent loss
SENSE
CC
T
CC
+ Q
ESR
will scale the V
from an output-derived power source
CC
DS(ON)
CC
= 40mΩ (sum of both input and
and ESR to obtain I
B
to ground. The resulting dQ/dt is
), where Q
current results in approximately
CC
that is typically much larger
= 30mΩ, R
DS(ON)
www.DataSheet4U.com
T
, then the resistance
and Q
IN
L
current required
= 50mΩ, R
IN
2
B
R losses. For
current typi-
are the gate
OUT
for the
SENSE
3858fa

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