LTC3868 Linear Technology, LTC3868 Datasheet - Page 23

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LTC3868

Manufacturer Part Number
LTC3868
Description
Low IQ Dual 2-Phase Synchronous Step-Down Controller
Manufacturer
Linear Technology
Datasheet

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0
A comparator monitors the output for overvoltage condi-
tions. The comparator detects faults greater than 10%
above the nominal output voltage. When this condition
is sensed, the top MOSFET is turned off and the bottom
MOSFET is turned on until the overvoltage condition is
cleared. The bottom MOSFET remains on continuously
for as long as the overvoltage condition persists; if V
returns to a safe level, normal operation automatically
resumes.
A shorted top MOSFET will result in a high current condition
which will open the system fuse. The switching regulator
will regulate properly with a leaky top MOSFET by altering
the duty cycle to accommodate the leakage.
Phase-Locked Loop and Frequency Synchronization
The LTC3868 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a lowpass filter,
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the top MOSFET of controller 1 to be locked to
the rising edge of an external clock signal applied to the
PLLIN/MODE pin. The turn-on of controller 2’s top MOSFET
is thus 180 degrees out of phase with the external clock.
The phase detector is an edge sensitive digital type that
provides zero degrees phase shift between the external
and internal oscillators. This type of phase detector does
not exhibit false lock to harmonics of the external clock.
If the external clock frequency is greater than the internal
oscillator’s frequency, f
ously from the phase detector output, pulling up the VCO
input. When the external clock frequency is less than f
current is sunk continuously, pulling down the VCO input.
If the external and internal frequencies are the same but
exhibit a phase difference, the current sources turn on for
an amount of time corresponding to the phase difference.
The voltage at the VCO input is adjusted until the phase
and frequency of the internal and external oscillators are
identical. At the stable operating point, the phase detector
output is high impedance and the internal filter capacitor,
C
Note that the LTC3868 can only be synchronized to an
external clock whose frequency is within range of the
applicaTions inForMaTion
LP
, holds the voltage at the VCO input.
OSC
, then current is sourced continu-
OSC
OUT
,
LTC3868’s internal VCO, which is nominally 55kHz to 1MHz.
This is guaranteed to be between 75kHz and 850kHz.
Typically, the external clock (on the PLLIN/MODE pin)
input high threshold is 1.6V, while the input low threshold
is 1.1V.
Rapid phase locking can be achieved by using the FREQ
pin to set a free-running frequency near the desired
synchronization frequency. The VCO’s input voltage is
prebiased at a frequency corresponding to the frequency
set by the FREQ pin. Once prebiased, the PLL only needs
to adjust the frequency slightly to achieve phase lock
and synchronization. Although it is not required that the
free-running frequency be near external clock frequency,
doing so will prevent the operating frequency from passing
through a large range of frequencies as the PLL locks.
Table 2 summarizes the different states in which the FREQ
pin can be used.
Table 2
Any of the Above
Figure 9. Relationship Between Oscillator Frequency
and Resistor Value at the FREQ Pin
FREQ PIN
Resistor
INTV
0V
1000
900
800
700
400
300
200
100
600
500
CC
0
15
25
35 45 55
FREQ PIN RESISTOR (k )
PLLIN/MODE PIN
External Clock
DC Voltage
DC Voltage
DC Voltage
65 75 85 95 105 115 125
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LTC3868
3868 F09
Phase–Locked to
50kHz–900kHz
External Clock
FREQUENCY
350kHz
535kHz

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