74LVC16374ADGG,518 NXP Semiconductors, 74LVC16374ADGG,518 Datasheet - Page 2
![IC 16BIT EDGE TRIG D FF 48TSSOP](/photos/6/93/69378/48-tssop_sot370-1_pkg_sml.jpg)
74LVC16374ADGG,518
Manufacturer Part Number
74LVC16374ADGG,518
Description
IC 16BIT EDGE TRIG D FF 48TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Type Busr
Datasheet
1.74LVC16374ADGG518.pdf
(19 pages)
Specifications of 74LVC16374ADGG,518
Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
100MHz
Delay Time - Propagation
7ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4608-2
74LVC16374ADG-T
74LVC16374ADG-T
74LVC16374ADGG,118
74LVC16374ADGG,518
935235190118
935235190518
74LVC16374ADG-T
74LVC16374ADG-T
74LVC16374ADGG,118
74LVC16374ADGG,518
935235190118
935235190518
NXP Semiconductors
3. Ordering information
Table 1.
4. Functional diagram
74LVC_LVCH16374A_7
Product data sheet
Type number
74LVC16374ADL
74LVCH16374ADL
74LVC16374ADGG
74LVCH16374ADGG
74LVC16374ABQ
74LVCH16374ABQ
Fig 1.
Pin numbers are shown for SSOP48 and TSSOP48
packages only.
Logic symbol
Ordering information
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
Package
Temperature
range
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
1CP
1OE
48
1
2OE
2CP
24
25
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
001aaa253
All information provided in this document is subject to legal disclaimers.
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
Name
SSOP48
TSSOP48
HXQFN60U plastic thermal enhanced extremely thin quad flat
Rev. 07 — 23 March 2010
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
Description
plastic shrink small outline package; 48 leads;
body width 7.5 mm
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
package; no leads; 60 terminals; UTLP based;
body 4 x 6 x 0.5 mm
Fig 2.
Pin numbers are shown for SSOP48 and TSSOP48
packages only.
IEC logic symbol
2OE
1OE
1CP
2CP
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
48
24
25
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1
EN1
EN2
3D
4D
C3
C4
001aaa254
1
2
11
12
13
14
16
17
19
20
22
23
© NXP B.V. 2010. All rights reserved.
2
3
5
6
8
9
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
Version
SOT370-1
SOT362-1
SOT1134-1
2 of 19