IP4387CX4 NXP Semiconductors, IP4387CX4 Datasheet
IP4387CX4
Related parts for IP4387CX4
IP4387CX4 Summary of contents
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... Each device has a single high-performance ESD-protection diode with the anode and cathode each connected to two solder balls. The IP4085CX4, IP4385CX4, IP4386CX4 and IP4387CX4 are fabricated using monolithic silicon technology in a Wafer-Level Chip-Scale Package (WLCSP) with a pitch of 0.4 mm (IP438xCX4) or 0.5 mm (IP4085CX4). ...
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... NXP Semiconductors 2. Pinning information Fig 1. Pin configuration IP4085CX4; IP4385CX4; IP4386CX4; IP4387CX4 Table 1. Pin A1 and A2 B1 and B2 3. Ordering information Table 2. Ordering information Type number Package Name Description IP4085CX4/LF WLCSP4 wafer level chip-size package: 4 bumps; 0.91 IP4385CX4/LF WLCSP4 wafer level chip-size package: 4 bumps; 0.76 ...
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... IP4085CX4; 10 IP4386CX4 IP4085CX4; 8.5 IP4386CX4 IP4085CX4; 3.5 IP4386CX4 100 ms p IP4385CX4; 11 IP4387CX4 IP4385CX4; 9 IP4387CX4 IP4385CX4; 5 IP4387CX4 100 ms p [2] forward conducting [3] IP4085CX4 - [3] IP4385CX4; - IP4386CX4; IP4387CX4 Rev. 01 — 26 March 2009 www.DataSheet4U.com Max Unit 0.5 +14 V 0.5 +5.5 V 0 +15 ...
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... IP4085CX4 IP4385CX4 IP4386CX4 IP4387CX4 +14 +8 Rev. 01 — 26 March 2009 www.DataSheet4U.com Min Max 55 +150 - 260 30 +85 Table 4. Conditions Typ on a 2-layer PCB - [1] IP4085CX4; 130 IP4385CX4; IP4386CX4; IP4387CX4 Min Typ Max 200 - - 200 - - 800 © NXP B.V. 2009. All rights reserved. ...
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... IP4386CX4 IP4387CX4 V diode forward voltage Fd IP4085CX4 IP4385CX4 IP4386CX4 IP4387CX4 8. Application information 8.1 Forward current DC clamping voltage The forward current DC clamping voltage is of interest when protecting circuits from voltage sources with the wrong polarity. Fig 3. Measuring DC clamping voltage with forward current IP4085_4385_4386_4387_CX4_1 Product data sheet ...
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... +25 C. amb = +85 C. amb = 30 C. amb DC clamping voltage as a function of forward current; IP4385CX4 001aaj244 (1) (2) (3) 0 0.2 0.4 0.6 0 +25 C. amb = +85 C. amb = 30 C. amb DC clamping voltage as a function of forward current; IP4387CX4 © NXP B.V. 2009. All rights reserved. 1.0 (A) 1.0 ( ...
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... NXP Semiconductors 8.2 Peak clamping voltage The peak clamping voltage for forward and reverse current pulses of 8/20 s (IEC 61000-4-5) is significant when protecting circuits from power surges due to voltage discharges. The current pulse shape over time is shown in measurement setup for forward current and reverse current pulses respectively are shown ...
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... IP4385CX4 001aaj249 20 (3) (2) V (1) CL(M) ( (A) F (1) T (2) T (3) T Fig 13. Peak clamping voltage as a function of forward current; IP4387CX4 Rev. 01 — 26 March 2009 www.DataSheet4U.com 001aaj248 (3) ( +25 C. amb = +85 C. amb = 30 C. amb 001aaj250 (2) (3) (1) 28 ...
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... NXP Semiconductors Fig 14. Measuring peak clamping voltage with reverse current 19 (2) V CL(M) (V) 18 (1) 17 (3) 16 0.2 0.4 0.6 0.8 1.0 ( +25 C. amb ( +85 C. amb ( amb Fig 15. Peak clamping voltage as a function of reverse current; IP4085CX4 IP4085_4385_4386_4387_CX4_1 Product data sheet IP4085/4385/4386/4387/CX4 Integrated high-performance ESD-protection diodes ...
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... Fig 17. Peak clamping voltage as a function of reverse current; IP4386CX4 Remark: Measurements done on a heat-dissipation optimized PCB with massive copper area under the DUT. 9. Marking Fig 19. Marking of IP4085CX4, IP4385CX4, IP4386CX4 and IP4387CX4 IP4085_4385_4386_4387_CX4_1 Product data sheet IP4085/4385/4386/4387/CX4 Integrated high-performance ESD-protection diodes 001aaj253 12 ...
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... NXP Semiconductors 10. Package outline WLCSP4: wafer level chip-size package; 4 bumps; 0.91 x 0.91 x 0.65 mm ball A1 index area B A ball A1 1 index area Dimensions Unit max 0.70 0.26 0.37 0.96 0.96 mm nom 0.65 0.24 0.32 0.91 0.91 min 0.60 0.22 0.27 0.86 0.86 Outline version IEC IP4085CX4/LF Fig 20. Package outline IP4085CX4/LF (WLCSP4) IP4085_4385_4386_4387_CX4_1 Product data sheet IP4085/4385/4386/4387/CX4 Integrated high-performance ESD-protection diodes ...
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... NXP Semiconductors WLCSP4: wafer level chip-size package; 4 bumps; 0.76 x 0.76 x 0.61 mm ball A1 index area B A ball A1 1 index area Dimensions Unit max 0.66 0.22 0.31 0.81 0.81 mm nom 0.61 0.20 0.26 0.76 0.76 min 0.56 0.18 0.21 0.71 0.71 Outline version IEC IP438xCX4/LF Fig 21. Package outline IP438xCX4/LF (WLCSP4) IP4085_4385_4386_4387_CX4_1 Product data sheet IP4085/4385/4386/4387/CX4 Integrated high-performance ESD-protection diodes ...
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... NXP Semiconductors 11. Design and assembly recommendations 11.1 PCB design guidelines For optimum performance it is recommended to use a Non-Solder Mask PCB Design (NSMD), also known as a copper-defined design, incorporating laser-drilled micro-vias connecting the ground pads to a buried ground-plane layer. This results in the lowest possible ground inductance and provides the best high frequency and ESD performance ...
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... NXP Semiconductors Table 8. Symbol T reflow(peak dT/dt 12. Abbreviations Table 9. Acronym DUT FR4 LAN PCB PCS RoHS WAN WLCSP 13. Revision history Table 10. Revision history Document ID IP4085_4385_4386_4387_CX4_1 IP4085_4385_4386_4387_CX4_1 Product data sheet IP4085/4385/4386/4387/CX4 Integrated high-performance ESD-protection diodes Reflow soldering process characteristics ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 16. Contents 1 Product profi 1.1 General description 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Limiting values Thermal characteristics Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Application information 8.1 Forward current DC clamping voltage . . . . . . . 5 8.2 Peak clamping voltage . . . . . . . . . . . . . . . . . . . 7 9 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 11 Design and assembly recommendations ...