MBM29DL34TF Fujitsu Media Devices, MBM29DL34TF Datasheet - Page 24

• Manufacturer Part Number: MBM29DL34TF
• Description: (MBM29DL34BF/TF) FLASH MEMORY CMOS 32 M (4 M X 8/2 M X 16) BIT
• Manufacturer: Fujitsu Media Devices

24
MBM29DL34TF/BF
1. Simultaneous Operation
* : By writing erase suspend command on the bank address of sector being erased, the erase operation gets
Note: Bank 1 and Bank 2 are divided for the sake of convenience at Simultaneous Operation. The Bank consists
2. Standby Mode
3. Automatic Sleep Mode
4. Autoselect
suspended so that it enables reading from or programming the remaining sectors.
FUNCTIONAL DESCRIPTION
The device features functions that enable reading of data from one memory bank while a program or erase
operation is in progress in the other memory bank (simultaneous operation) , in addition to conventional features
(read, program, erase, erase-suspend read, and erase-suspend program) . The bank can be selected by bank
address (A
Bank 1 : 8
The device can execute simultaneous operations between Bank 1 and Bank 2. The simultaneous operation
cannot execute multi-function mode in the same bank. “Simultaneous Operation Table” shows the possible
combinations for simultaneous operation. (Refer to “8 Bank-to-Bank Read / write Timing Diagram” in TIMING
DIAGRAM.
There are two ways to implement the standby mode on the device, one using both the CE and RESET pins, and
the other via the RESET pin only.
When using both pins, CMOS standby mode is achieved with CE and RESET inputs both held at V
Under this condition the current consumed is less than 5 A Max. During Embedded Algorithm operation, V
active current (I
from either of these standby modes.
When using the RESET pin only, CMOS standby mode is achieved with RESET input held at V
high, the device requires t
During standby mode, the output is in the high impedance state, regardless of the OE input.
Automatic sleep mode works to restrain power consumption during read-out of device data. It can be useful in
applications such as handy terminal, which requests low power consumption.
To activate this mode, the devices automatically switch themselves to low power mode when the devices ad-
dresses remain stable after 150 ns from data valid. It is not necessary to control CE, WE, and OE in this mode.
Under the mode, the current consumed is typically 1 A (CMOS Level) .
During simultaneous operation, V
Since the data are latched during this mode, the data are continuously read out. If the addresses are changed,
the mode is automatically canceled and the devices read out the data for changed addresses.
The autoselect mode allows reading out of a binary code and identifies its manufacturer and type. This mode
is intended for use by programming equipment for the purpose of automatically matching the devices to be
“H” or “L”) . Under this condition the current consumed is less than 5 A Max. Once the RESET pin is set
of 4 banks, Bank A, Bank B, Bank C and Bank D. Bank Address (BA) means to specify each of the Banks.
Case
1
2
3
4
5
6
7
20
, A
8 KB and 63
19
CC2
, A
) is required even when CE
18
) with zero latency. The device consists of the following two banks :
RH
64 KB; Bank 2 : 48
of wake up time for output to be valid for read access.
CC
Autoselect Mode
Bank 1 status
Program Mode
Erase Mode *
active current (I
Read Mode
Read Mode
Read Mode
Read Mode
Simultaneous Operation Table
70
64 KB.
“H”. The device can be read with standard access time (t
CC2
) is required.
Autoselect Mode
Program Mode
Bank 2 status
Erase Mode *
Read Mode
Read Mode
Read Mode
Read Mode
SS
CC
0.3 V (CE
0.3 V.
CE
CC
)