MBM29PL32BM Fujitsu Media Devices, MBM29PL32BM Datasheet - Page 28

• Manufacturer Part Number: MBM29PL32BM
• Description: (MBM29PL32TM/BM) FLASH MEMORY CMOS 32 M (4M X 8/2M X 16) BIT MirrorFlash
• Manufacturer: Fujitsu Media Devices

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MBM29PL32TM/BM
Erase Suspend/Resume
Fast Mode Set/Reset
Fast Programming
Extended Sector Group Protection
The Erase Suspend command allows the user to interrupt Sector Erase operation and then perform read or
programming to a sector not being erased. This command is applicable ONLY during the Sector Erase operation
within the time-out period for sector erase. Writting the Erase Suspend command (B0h) during the Sector Erase
time-out results in immediate termination of the time-out period and suspension of the erase operation.
Writing the "Erase Resume" command (30h) resumes the erase operation.
When the "Erase Suspend" command is written during the Sector Erase operation, the device takes maximum
of “t
pin will be at High-Z and the DQ
of the erasing sector for reading DQ
writes of the Erase Suspend command are ignored.
To resume the operation of Sector Erase, the Resume command (30h) should be written. Any further writes of
the Resume command at this point will be ignored. Another Erase Suspend command can be written after the
chip has resumed erasing.
Do not issue program command after entering erase-suspend-read mode.
The device has Fast Mode function. It dispenses with the initial two unclock cycles required in the standard
program command sequence by writing Fast Mode command into the command register. In this mode, the
required bus cycle for programming consists of two cycles instead of four bus cycles in standard program
command. The read operation is also executed after exiting this mode. During the Fast mode, do not write any
command other than the Fast program/Fast mode reset command. To exit from this mode, write Fast Mode Reset
command into the command register. (Refer to the “Embedded Program
CHART.) The V
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). See “Embedded
Program
In addition to normal sector group protection, the device has Extended Sector Group Protection as extended
function. This function enables protection of the sector group by forcing V
sequence. Unlike conventional procedures, it is not necessary to force V
The only RESET pin requires V
requires V
into the command register. Then the sector group addresses pins (A
and (A
addresses pins is recommended), and write extended sector group protection command (60h). A sector group
is typically protected in 250 s. To verify programming of the protection circuitry, the sector group addresses
pins (A
a command (40h). Following the command write, a logical “1” at device output DQ
sector in the read operation. If the output data is logical “0”, write the extended sector group protection command
(60h) again. To terminate the operation, set RESET pin to V
Timing Diagram” in SWITCHING WAVEFORMS and “Extended Sector Group Protection Algorithm” in FLOW
CHART.)
SPD
” to suspend the erase operation. When the devices enter the erase-suspended mode, the RY/BY output
6
20
, A
, A
TM
ID
3
Algorithm for Fast Mode” in FLOW CHART.
, A
19
on RESET pin. With this condition, the operation is initiated by writing the set-up command (60h)
, A
2
, A
CC
18
, A
1
active current is required even CE = V
, A
17,
0
) = (0, 0, 0, 1, 0) should be set to the sector group to be protected (set V
A
16,
A
15,
ID
A
7
bit will be at logic “1” and DQ
14,
for sector group protection in this mode. The extended sector group protection
A
6
and DQ
13
and A
90/10
7
12
to determine if the erase operation has been suspended. Further
) and (A
6
, A
IH
3
during Fast Mode.
, A
IH
6
. (Refer to the “Extended Sector Group Protection
2
will stop toggling. The user must use the address
, A
1
, A
0
20
) = (0, 0, 0, 1, 0) should be set and write
, A
ID
TM
on RESET pin and writes a command
ID
19
Algorithm for Fast Mode” in FLOW
, A
and control timing for control pins.
18
, A
17,
0
will produce for protected
A
16,
A
15,
A
14,
IL
for the other
A
13
and A
12
)