stvm100 STMicroelectronics, stvm100 Datasheet

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stvm100

Manufacturer Part Number
stvm100
Description
I2c Lcd Vcom Calibrator
Manufacturer
STMicroelectronics
Datasheet

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Features
Applications
Table 1.
July 2007
STVM100DC6E
I
7-bit adjustable sink current output
2.25V to 3.6V logic supply voltage V
AV
– 4.5V to 20V for V
– 4.5V to 13V for V
EEPROM for storing the optimum V
Guaranteed monotonic output over operating
range
400kHz maximum interface bus speed
Operating temperature: –40°C to 85°C
Available in an 8-pin 3mm x 3mm TDFN8 or
3mm x 3mm TSSOP8 Package
TFT-LCD panels
STVM100DS6F
2
C interface, slave address: 1001111
Order code
DD
operating voltages
Device summary
Optimum temperature range
DD
DD
from 2.6V to 3.6V
from 2.25V to 3.6V
-40°C to 85°C
-40°C to 85°C
COM
DD
setting
Rev 6
Description
The STVM100 is a programmable VCOM adjust-
ment solution for thin-film transistor (TFT) liquid-
crystal displays (LCDs) to remove “flickers”. It can
replace a mechanical potentiometer, so that the
factory operator can physically view the front
screen when performing the VCOM adjustment.
This significantly reduces labor costs, increases
reliability, and enables automation.
STVM100 provides a digital I
trol the sink current output (I
drives an external resistive voltage divider, which
can then be applied to an external V
Three external resistors R
mine the highest and lowest value of the V
An increase in the output sink current will lower
the voltage on the external divider so that the
V
range. Once the desired V
achieved, it can be stored in the internal
EEPROM that will be automatically recalled dur-
ing each power-up.
STVM100 is available in an 8-pin, 3mm x 3mm
TDFN8 or 3mm x 3mm TSSOP8 package.
COM
Package
TSSOP
TDFN
can be adjusted by 128 steps within this
TSSOP8 (3mm x 3mm) (DS)
TDFN8 (3mm x 3mm) (DC)
I
2
C LCD VCOM calibrator
ECOPACK package, tape and reel
ECOPACK package, tubes
1
COM
, R
Packing
OUT
2
C interface to con-
2
STVM100
, and R
setting is
). This output
COM
SET
buffer.
www.st.com
deter-
COM
1/27
.
1

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stvm100 Summary of contents

Page 1

... V COM range. Once the desired V achieved, it can be stored in the internal EEPROM that will be automatically recalled dur- ing each power-up. STVM100 is available in an 8-pin, 3mm x 3mm TDFN8 or 3mm x 3mm TSSOP8 package. Package -40°C to 85°C TDFN -40°C to 85°C TSSOP ...

Page 2

Contents 1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

... DD Figure 13. AV supply current v’s temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DD Figure 14. I error v’s temperature (STVM100 at middle scale OUT Figure 15. Total unadjusted error v’s DAC setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 16. Differential non-linearity v’s DAC setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 17. Integral non-linearity v’s DAC setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 18. ...

Page 5

... SCL Input SET Analog 1. See SET pin function in this table for the maximum adjustable sink current setting SDA SCL STVM100 WP GND Function Adjustable sink current output pin. See Section 3: Application information on page High-voltage analog supply. Bypass to GND with a 0.1µF capacitor. ...

Page 6

... AV DD SCL 2 7 SDA GND 4 5 AI12273 19R DAC + Interface – 7 EEPROM Block GND 0.1µ SDA AV DD STVM100 R 1 SCL OUT WP SET R 2 GND R SET OUT SET AI12274 0.1µF + VCOM – AI12275 ...

Page 7

... Device operation The STVM100 operates as a slave device on the serial bus. Access is obtained by implementing a Start condition, followed by the 7-bit slave address (1001111), and the eighth bit for READ/WRITE identification. The volatile DAC register and non-volatile EEPROM values can be read out or written in. ...

Page 8

Data valid The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is ...

Page 9

Acknowledge Each byte of eight bits is followed by one Acknowledge bit. This Acknowledge bit is a low level signal put on the bus by the receiver, whereas the master generates an extra acknowledge-related clock pulse (see obliged to ...

Page 10

... READ mode, the valid data is the first 7 bits and the P bit (the eight bit) is don’t care. 2.3 Write mode In WRITE mode the master transmits to the STVM100 slave receiver. The bus protocol is shown in Figure 7. Following the Start condition and slave address, a logic '0' (R placed on the bus to identify a WRITE operation ...

Page 11

... The STVM100 is a programmable V 2 provides a digital I external resistive voltage divider, which can then be applied to an external V The highest and lowest V connection is shown in The sink current from the STVM100 OUT pin is given in through R . This current must be less than 120µA (see I SET Figure 8. R ...

Page 12

If the user-selected value is 0 (zero scale), the minimum current is sunk. The maximum V value is obtained in COM Equation 3 If the user-selected value is 127 (full scale), the maximum current is sunk and the minimum V ...

Page 13

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. ...

Page 14

DC and AC parameters This section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the Measurement ...

Page 15

Table 7. DC and AC characteristics Sym Description Supply voltage EEPROM V DD programming supply voltage ( supply current Analog supply voltage DD ( supply current AVDD DD SET SET voltage resolution VR ...

Page 16

Figure 9. Bus timing requirements sequence SDA tBUF SCL P Table 8. AC characteristics Sym Description f SCL clock frequency SCL t Clock low period LOW t Clock high period HIGH t Data setup time SU:DAT t Data hold time ...

Page 17

... Typical operating characteristics Typical operating characteristics for the STVM100 are T OUT = 1/2 , and R AVDD Figure 10. V supply current v’ Figure 11 24.9k except where noted. SET DD 27 26.5 26 25.5 25 24.5 24 .2. 2 2.4 2.6 2 (V) supply current v’ 4 ...

Page 18

Figure 12. V supply current v’s temperature DD Figure 13 18/ -40 -30 -20 - Temperature˚C supply current v’s temperature 4.95 4.9 4.85 ...

Page 19

... Figure 14. I error v’s temperature (STVM100 at middle scale) OUT 0.06 0.05 0.04 0.03 0.02 0.01 0 -40 Figure 15. Total unadjusted error v’s DAC setting 0.022474 0.020395 0.018316 0.016237 0.014158 0.012079 0.01 - Temperature˚C AI13366 113 DAC settling (decimal) AI13367 19/27 ...

Page 20

Figure 16. Differential non-linearity v’s DAC setting Figure 17. Integral non-linearity v’s DAC setting 20/27 0.2 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0 DAC setting (decimal) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 ...

Page 21

Figure 18. AV power-up response OUT V SET AV : 5V/DIV Figure 19. Full scale-up response SCL SDA V OUT V SET SCL: 5V/DIV, SDA: 5V/DIV, V 5ms/DIV : 5V/DIV ...

Page 22

Figure 20. Full scale-down response SCL SDA V OUT V SET 22/27 20µs/DIV SCL: 5V/DIV, SDA: 5V/DIV, V OUT ai13372 : 1V/DIV 1V/DIV SET ...

Page 23

Package mechanical In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box ...

Page 24

Figure 22. TSSOP8 – 8-lead, thin shrink small outline, 3mm x 3mm, mech. data CP Note: Drawing is not to scale. Table 10. TSSOP8 – 8-lead, thin shrink small outline, 3mm x 3mm, mech. data Sym Typ ...

Page 25

... Part numbering Table 11. Ordering information scheme Example: Device type STVM100, V calibrator with 7-bit DAC and I COM Package DC = TDFN8 DS = TSSOP8 Temperature range 6 = –40 to 85°C Shipping method E = ECOPACK package, tubes F = ECOPACK package, tape & reel For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you ...

Page 26

Revision history Table 12. Revision history Date Revision 09-May-2006 14-Jul-2006 08-Nov-2006 12-Feb-2007 20-Apr-2007 24-Jul-2007 26/27 1 Initial release. 2 Graphical and textual updates Document status upgraded to Preliminary Data; changed the wording of Input function to include ‘WRITE operations’ ...

Page 27

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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