stvm100 STMicroelectronics, stvm100 Datasheet - Page 8

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stvm100

Manufacturer Part Number
stvm100
Description
I2c Lcd Vcom Calibrator
Manufacturer
STMicroelectronics
Datasheet

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2.1.4
8/27
Data valid
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or
LOW state of the data line can only change when the clock signal on the SCL line is low
(see
There is one clock pulse per bit of data.
Each data transfer is initiated with a Start condition and terminated with a Stop condition.
The number of data bytes transferred between the Start and Stop conditions is not limited.
The information is transmitted byte-wide and each receiver acknowledges transmission with
a ninth bit.
By definition, the device that gives out a message is called “transmitter”, the device that gets
the message is called “receiver”. The device that controls the message is called the
“master”. The devices controlled by the master are called “slave” devices.
Figure 5.
CLOCK
DATA
Figure
5). The data on the line may be changed during the clock signal low period.
Serial bus data transfer sequence
CONDITION
START
DATA VALID
DATA LINE
STABLE
DATA ALLOWED
CHANGE OF
CONDITION
STOP
AI00587

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