cy29962 Cypress Semiconductor Corporation., cy29962 Datasheet - Page 4

• Manufacturer Part Number: cy29962
• Description: 2.5v/3.3v, 150-mhz Multi-output Zero Delay Buffer Semiconductor
• Manufacturer: Cypress Semiconductor Corporation.

Maximum Ratings
Maximum Input Voltage Relative to V
Maximum Input Voltage Relative to V
Storage Temperature: ................................ –65 C to + 150 C
Operating Temperature: ................................ –40 C to +85 C
Maximum ESD protection ............................................... 2 kV
Maximum Power Supply: ................................................5.5V
Maximum Input Current:
Table 3. DC Parameters V
Table 4. DC Parameters V
Document #: 38-07364 Rev. *B
V
V
V
V
I
I
V
V
I
C
V
V
V
V
I
I
V
V
I
C
Notes:
Parameter
IL
IH
DD
IL
IH
DD
3.
4.
5.
6.
7.
Parameter
IL
IH
PP
CMR
OL
OH
IL
IH
PP
CMR
OL
OH
IN
IN
[6]
[6]
[6]
[6]
[4]
[3]
[4]
[3]
[7]
[7]
[7]
[7]
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
The LVCMOS inputs threshold is at 30% of V
The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the HIGH input is within the VCMR
range and the input lies within the V
Inputs have pull-up/pull-down resistors that affect input current.
Driving series or parallel terminated 50
[5]
[5]
Input LOW Voltage
Input HIGH Voltage
Peak-to-Peak Input Voltage PECL_CLK
Common Mode Range PECL_CLK
Input LOW Current (@ V
Input HIGH Current (@ V
Output LOW Voltage
Output HIGH Voltage
Quiescent Supply Current
Input Pin Capacitance
Input LOW Voltage
Input HIGH Voltage
Peak-to-Peak Input Voltage PECL_CLK
Common Mode Range PECL_CLK
Input LOW Current (@ V
Input HIGH Current (@ V
Output LOW Voltage
Output HIGH Voltage
Quiescent Supply Current
Input Pin Capacitance
[3]
DD
DD
Description
= 2.5V ±5%, T
= 3.3V ±5%, T
Description
PP
specification.
SS
DD
(or 50
: ............. V
:............. V
IL
DD
IH
IL
= V
IH
.
= V
to V
= V
= V
A
A
SS
DD
DD
= –40 C to +85 C
= –40 C to +85 C
SS
DD
)
/2) transmission lines.
)
)
DD
)
SS
– 0.3V
+ 0.3V
20 mA
V
I
OH
I
Conditions
DD
V
OL
I
Conditions
OH
I
DD
OL
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any
voltage higher than the maximum rated voltages to this circuit.
For proper operation, V
the range:
V
Unused inputs must always be tied to an appropriate logic
voltage level (either V
= –15 mA
and AV
= 15 mA
SS
= –24mA
and AV
= 24mA
< (V
DD
IN
DD
or V
OUT
V
V
DD
DD
Min.
V
) < V
500
1.7
1.8
Min.
V
500
2.0
2.4
SS
– 1.4
SS
SS
– 1.4
IN
DD
or V
and V
.
DD
).
Typ.
OUT
Typ.
15
10
4
4
should be constrained to
V
V
DD
Max.
1000
–120
DD
0.55
V
120
0.8
Max.
1000
–120
20
V
120
DD
0.7
0.6
13
– 0.6
CY29962
DD
– 0.6
Page 4 of 7
Unit
mV
mA
Unit
µA
µA
pF
mV
mA
V
V
µA
µA
V
V
V
pF
V
V
V
V
V