cy25c01 Cypress Semiconductor Corporation., cy25c01 Datasheet

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cy25c01

Manufacturer Part Number
cy25c01
Description
1 Kbit, 2 Kbit, 4 Kbit, 8 Kbit, And 16 Kbit X8 Spi Serial Eeprom
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Features
Cypress Semiconductor Corporation
Document #: 001-15633 Rev. *C
Logic Block Diagram
Continuous voltage operation
Internally organized as 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K), or 2048 x 8 (16K)
Serial peripheral interface compatible
Supports SPI modes 0 (0,0) and 3 (1,1)
Block write protection
Fast clock rate
Write protect (WP) pin and write disable instructions for both
hardware and software data protection
32-byte page write mode
Self timed write cycle (5 ms max)
High reliability
Industrial temperature range
8-Pin SOIC and 8-Pin TSSOP packages
Pb-free and RoHS compliant
V
Protect 1/4,1/2, or entire array
20 MHz clock rate (V
10 MHz clock rate (V
Endurance: 1 million write cycles
Data retention: 100 years
CC
= 1.8V to 5.5V
CC
CC
= 4.5V to 5.5V)
= 1.8V to 5.5V)
HOLD
SCK
WP
CS
SI
1 Kbit, 2 Kbit, 4 Kbit, 8 Kbit, and 16 Kbit (x8)
198 Champion Court
CY25C01/02/04/08/16
Functional Description
The CY25C01/02/04/08/16 provides 1024, 2048, 4096, 8192,
and 16384 bits of serial Electrically Erasable and Programmable
Read Only Memory (EEPROM) organized as 128, 256, 512,
1024, or 2048 words of eight bits each. The device is optimized
for use in many industrial applications where low power and low
voltage operations are essential. The CY25C01/02/04/08/16 is
available in space saving 8-Pin SOIC, and 8-Pin TSSOP
packages.
The CY25C01/02/04/08/16 is enabled through the Chip Select
pin (CS) and accessed via a three-wire interface consisting of
Serial Data Input (SI), Serial Data Output (SO), and Serial Clock
(SCK). All programming cycles are completely self timed and no
separate erase cycle is required before write.
Block write protection is enabled by programming the status
register with one of four blocks of write protection. Separate
program enable and program disable instructions are provided
for additional data protection. Hardware data protection is
provided through the WP pin to protect against inadvertent write
attempts to the status register. The HOLD pin can be used to
suspend any serial communication without resetting the serial
sequence.
V
V
SS
CC
San Jose
,
SPI Serial EEPROM
CA 95134-1709
SO
CY25C01/02/04/08/16
Revised February 05, 2009
408-943-2600
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cy25c01 Summary of contents

Page 1

... The CY25C01/02/04/08/16 is available in space saving 8-Pin SOIC, and 8-Pin TSSOP packages. The CY25C01/02/04/08/16 is enabled through the Chip Select pin (CS) and accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self timed and no separate erase cycle is required before write ...

Page 2

... Top View 2 HOLD (not to scale SCK GND 4 I/O Type Input Output Input Input Input Input Input Input CY25C01/02/04/08/16 CC Description Chip Select Serial Data Output Write Protect Ground Serial Data Input Serial Data Clock Suspends Serial Input Power Supply Page [+] Feedback ...

Page 3

... When the WP pin is brought low, all write Document #: 001-15633 Rev. *C CY25C01/02/04/08/16 operations are inhibited. WP going low while CS is still low inter- rupts a write to the CY25C01/02/04/08/16. If the internal write cycle is already initiated, WP going low has no effect on the write operation. SPI Modes ...

Page 4

... The synchronous Serial Peripheral Interface (SPI) helps the CY25C01/02/04/08/16 to interface directly with many of the popular microcontrollers. The CY25C01/02/04/08/16 uses an 8-bit instruction register. The list of instructions and their operation codes are contained in Table 2. All instructions, addresses, and data are transferred with the MSB, and it starts with a high to low (CS) transition ...

Page 5

... Table 6. Bits 4–6 are ‘0’s when device is not in an internal write cycle. Bit WPEN) When the device is not in an internal write cycle, this bit CY25C01/02/04 and WPEN (See Table 7 on page 5) in CY25C08/16 Bits 0–7 are ‘1’s during an internal write cycle. ...

Page 6

... If Bit 0 = ‘0’, the write cycle has ended. Only the RDSR instruction is enabled during the write programming cycle. The CY25C01/02/04/08/16 is capable of a 32-byte page write operation. After each byte of data is received, the five low order address bits are internally incremented by one; the high order bits of the address remain constant ...

Page 7

... Figure 5. Write Disable (WRDI) Instruction Timing CS SCK SI Figure 6. Read Status Register (RDSR) Instruction Timing CS SCK SI SO Figure 7. Write Status Register (WRSR) Instruction Timing CS SCK HOLD SO Document #: 001-15633 Rev. *C CY25C01/02/04/08/16 Page [+] Feedback ...

Page 8

... CS SCK SI SO Document #: 001-15633 Rev. *C Figure 8. Read Instruction Timing Figure 9. Write Instruction Timing CY25C01/02/04/08/16 Page [+] Feedback ...

Page 9

... 1.8V < V < 2.7V CC 2.7V < V < 5.5V CC 1.8V < V < 5. mA, 3.6 < V < 5. 0.15 mA, 1.8 < V < 3. -0.1 mA, 1.8 < V < 3. -1.6 mA, 3.6 < V < 5. CY25C01/02/04/08/16 [3] ....................................... 1.8V to 5.5V Min Max Unit 1.8 5.5 V μA 1 μA 1.1 μA 1 μA 1 μA 1 [4] –0.6 0 [4] – ...

Page 10

... V HT REFERENCE POINTS for a logic “1” and V (0.1V ) for a logic “0”. Measurement reference points for inputs ILT 0.1V). Input rise and fall times (10%–90%) are < CY25C01/02/04/08/16 Max Unit 8-SOIC 8-TSSOP Unit °C/W 120.83 119.31 °C/W 90.31 82.77 ...

Page 11

... Document #: 001-15633 Rev MHz (4.5V to 5.5V) Min Max 4.8 4.8 Figure 12. Synchronous Data Timing (Mode CY25C01/02/04/08/16 10 MHz Unit (1.8V to 5.5V) Min Max 10 MHz ...

Page 12

... SPI Interface Cypress Document #: 001-15633 Rev. *C Figure 13. HOLD Timing t S.HLD t H.HLD t H.HLD t HZ Option Tape & Reel Blank = Std. Temperature Industrial (–40 to 85°C) Package SOIC Z = TSSOP Voltage 1.8V - 5.5V CY25C01/02/04/08/16 t S.HLD t LZ Density Page [+] Feedback ...

Page 13

... SOIC 8-Pin SOIC (Tape & Reel) 51-85093 8-Pin TSSOP 8-Pin TSSOP (Tape & Reel) 51-85066 8-Pin SOIC 8-Pin SOIC (Tape & Reel) 51-85093 8-Pin TSSOP 8-Pin TSSOP (Tape & Reel) CY25C01/02/04/08/16 Operating Range Industrial Industrial Industrial Industrial Industrial Page ...

Page 14

... S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. SEATING PLANE 0.061[1.549] 0.068[1.727] 0.004[0.102] 0.004[0.102] 0°~8° 0.016[0.406] 0.0098[0.249] 0.035[0.889] CY25C01/02/04/08/16 MAX. PART # 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] 0.0098[0.249] 51-85066-*C Page [+] Feedback ...

Page 15

... Package Diagrams (continued) Document #: 001-15633 Rev. *C Figure 15. 8-Pin (4.4 mm) TSSOP, 51-85093 CY25C01/02/04/08/16 51-85093-*A Page [+] Feedback ...

Page 16

... Document History Page Document Title: CY25C01/02/04/08/16, 1 Kbit, 2 Kbit, 4 Kbit, 8 Kbit, and 16 Kbit (x8) SPI Serial EEPROM Document Number: 001-15633 Rev. ECN No. Orig. of Submission Change Date ** 1069220 UHA See ECN *A 2522135 GVCH/ 06/27/08 PYRS *B 2611873 VKN/ 11/24/08 PYRS *C 2656511 VKN/PYRS 02/09/09 Document #: 001-15633 Rev. *C Description of Change ...

Page 17

... All products and company names mentioned in this document may be the trademarks of their respective holders. PSoC Solutions psoc.cypress.com General clocks.cypress.com Low Power/Low Voltage Precision Analog LCD Drive image.cypress.com CAN 2.0b USB Revised February 05, 2009 CY25C01/02/04/08/16 psoc.cypress.com/solutions psoc.cypress.com/low-power psoc.cypress.com/precision-analog psoc.cypress.com/lcd-drive psoc.cypress.com/can psoc.cypress.com/usb Page [+] Feedback ...

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