cy28rs600-2 SpectraLinear Inc, cy28rs600-2 Datasheet - Page 9

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cy28rs600-2

Manufacturer Part Number
cy28rs600-2
Description
Clock Generator For Ati Rs5xx, 6xx Chipsets
Manufacturer
SpectraLinear Inc
Datasheet
Rev 1.0, November 22, 2006
Byte 14: ATIG DAF Register1
Byte 15: WDT Recovery Register
Byte 16: Overclocking Support Register
Table 5. Crystal Recommendations
Crystal Recommendations
The CY28RS600-2 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28RS600-2 to operate at the wrong frequency and violate
the ppm specification. For most applications there is a
14.31818 MHz
Frequency
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
(Fund)
@Pup
@Pup
@Pup
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Cut
AT
Watchdog Autorecovery Watchdog Autorecovery Mode
Loading Load Cap
Parallel
RECOVERY_N[7]
RECOVERY_N[6]
RECOVERY_N[5]
RECOVERY_N[4]
RECOVERY_N[3]
RECOVERY_N[2]
RECOVERY_N[1]
RECOVERY_N[0]
ATIG_DAF_N[7]
ATIG_DAF_N[6]
ATIG_DAF_N[5]
ATIG_DAF_N[4]
ATIG_DAF_N[3]
ATIG_DAF_N[2]
ATIG_DAF_N[1]
ATIG_DAF_N[0]
Prog_ATIG_EN
Prog_SRC_EN
Prog_CPU_EN
Recovery_N8
ATIG_N8
FS[C:A]
DF_EN
Name
Name
Name
20 pF
INFORMATION
ADVANCE
0.1 mW
(max.)
If Prog_ATIG_EN is set, the values programmed in ATIG_DAF_N[8:0] will
be used to determine the ATIG output frequency.
Used when RESET_IN# is asserted or the Watch Dog timer times out. This
will be the safe value or last known good frequency of the CPU. It is set
by the user before engaging in any overclocking exercise. M values revert
to those set by the FS[C:A] pins
ATIG DAF bit N8
FS_override
0 = Select operating frequency by FS[C:A] input pins
1 = Select operating frequency by FSEL[C:A] register values
Dynamic Frequency enable for CPU frequencies
0 = Disable, 1 = Enable
Enables the setting of SRC_PLL (PLL3) N values via byte 8
0 = Disable, 1 = Enable
Enables the setting of ATIG_PLL (PLL2) N values via byte 17
0 = Disable, 1 = Enable
Enables the setting of CPU_PLL (PLL1) M and N values via byte 15 and 16
0 = Disable, 1 = Enable
0 = Disable (manual), 1 = Enable (Auto)
CPU Safe recovery bit 8 for RESET_IN and Watchdog timer timeout.
Drive
Shunt Cap
300-ppm frequency shift between series and parallel crystals
due to incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
(max.)
5 pF
Motional
0.016 pF
(max.)
Description
Description
Description
Tolerance
35 ppm
(max.)
CY28RS600-2
Stability
30 ppm
(max.)
Page 9 of 17
Aging
(max.)
5 ppm

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