cy22313 Cypress Semiconductor Corporation., cy22313 Datasheet - Page 4

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cy22313

Manufacturer Part Number
cy22313
Description
Two-pll Clock Generator With Direct Rambus Lite Support
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Document #: 38-07434 Rev. *E
Switching Characteristics
Phase Noise Specifications
Jitter Specifications
F
DC
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
10. Measured on same pin of a single device.
11. Lock Time shown in Figure 2.
12. LCLK and 54MOUT Cycle-Cycle Jitter shown in Figure 3.
13. LCLK and 54MOUT 1000 Cycle Jitter shown in Figure 4.
14. CLK/CLKB 1-6 Cycle Jitter specification is absolute value of worst case deviation, and is shown in Figure 5 and Figure 6.
15. CLK/CLKB Long Term Jitter shown in Figure 7.
16. CLK/CLKB Duty Cycle Error shown in Figure 8.
Parameter
Parameter
3_54, 2.5
3_54, 1.675
4_54, 2.5
4_54, 1.675
CR
CR-CF
5
6_LCLK
6_54, 2.5
6_54, 1.675
7_LCLK
7_54
8
9
10
8.
9.
Parameter
PPM
, t
Tested across three lots on same board, PCB boards can vary more than ± 5 PPM.
Crystal should not be heated for this test, only IC.
CF
Frequency Error
Output Duty Cycle
54MOUT Rising Edge Slew Rate 20% to 80% of V
54MOUT Rising Edge Slew Rate 20% to 80% of V
54MOUT Falling Edge Slew Rate 80% to 20% of V
54MOUT Falling Edge Slew Rate 80% to 20% of V
CLK/CLKB Rise and Fall Times
CLK/CLKB Rise and Fall
Difference
Lock Time
LCLK Jitter
54MOUT Jitter
LCLK 1000 Cycle Jitter
54MOUT 1000 Cycle Jitter
CLK/CLKB 1–6 Cycle Jitter
CLK/CLKB Long-term Jitter
CLK/CLKB Duty Cycle Error
Phase Noise
Phase Noise
[10]
[11]
Description
Description
Description
[12]
[3]
[12]
[3]
[13]
[13]
[14]
[15]
[16]
Part to Part, does not include PCB variation
Over commercial temperature range
20% to 80% of output voltage
20% to 80% of output voltage
PLL lock time from power-up
Cycle-Cycle Jitter – 9.216 MHz
Cycle-Cycle Jitter – 54 MHz, V
Cycle-Cycle Jitter – 53.946 MHz, V
Cycle-Cycle Jitter – 54 MHz, V
Cycle-Cycle Jitter – 53.946 MHz, V
1000 Cycle Jitter – 9.216 MHz
1000 Cycle Jitter – 54 MHz,
1000 Cycle Jitter – 53.946 MHz,
Cycle-Cycle Jitter, 1–6 Cycles, 400 MHz
Cycle-Cycle Jitter, 1–6 Cycles, 300 MHz
Long-term Jitter, 400 MHz
Long-term Jitter, 300 MHz
Cycle-Cycle Duty Cycle Error, 400 MHz
Cycle-Cycle Duty Cycle Error, 300 MHz
Duty cycle for all outputs, measured at V
54 MHz at 10-kHz offset
53.946 MHz at 10-kHz offset
DD54
DD54
DD54
DD54
Conditions
Conditions
, V
, V
, V
, V
Conditions
DD54
DD54
DD54
DD54
= 2.5V
= 1.675V
= 2.5V
= 1.675V
DD
DD
= 2.5V
= 1.675V
DD
DD
[9]
= 2.5V
= 1.675V
DD
/2
[8]
Min.
0.75
0.35
0.75
0.35
Min.
160
45
Typ.
Typ.
Typ.
–95
–92
1.2
0.5
1.2
0.5
1.0
±5
±2
50
CY22313
Max.
Max.
Max.
250
150
150
250
250
250
400
400
300
400
±10
400
100
4.0
2.5
4.0
2.5
3.0
50
70
50
70
±5
55
Page 4 of 9
PPM
PPM
V/ns
V/ns
V/ns
V/ns
Unit
Unit
Unit
dBc
dBc
ms
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
%
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