ds2154lnd2 Maxim Integrated Products, Inc., ds2154lnd2 Datasheet - Page 32

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ds2154lnd2

Manufacturer Part Number
ds2154lnd2
Description
Ds2154 Enhanced E1 Single Chip Transceiver
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
RIR: RECEIVE INFORMATION REGISTER (Address = 08 Hex)
(MSB)
TESF
SYMBOL
CRCRC
CASRC
FASRC
RESE
TESF
TESE
JALT
RESF
TESE
POSITION
RIR.7
RIR.6
RIR.5
RIR.4
RIR.3
RIR.2
RIR.1
RIR.0
JALT
NAME AND DESCRIPTION
Transmit Side Elastic Store Full. Set when the transmit side
elastic store buffer fills and a frame is deleted.
Transmit Side Elastic Store Empty. Set when the transmit side
elastic store buffer empties and a frame is repeated.
Jitter Attenuator Limit Trip. Set when the jitter attenuator
FIFO reaches to within 4 bits of its limit; useful for debugging
jitter attenuation operation.
Receive Side Elastic Store Full. Set when the receive side
elastic store buffer fills and a frame is deleted.
Receive Side Elastic Store Empty. Set when the receive side
elastic store buffer empties and a frame is repeated.
CRC Resync Criteria Met. Set when 915/1000 code words are
received in error.
FAS Resync Criteria Met. Set when 3 consecutive FAS words
are received in error.
CAS Resync Criteria Met. Set when 2 consecutive CAS MF
alignment words are received in error.
RESF
32 of 87
RESE
CRCRC
FASRC
CASRC
(LSB)

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