ds2155gt-r Maxim Integrated Products, Inc., ds2155gt-r Datasheet - Page 208
![no-image](/images/no-image-200.jpg)
ds2155gt-r
Manufacturer Part Number
ds2155gt-r
Description
Ds2155 T1/e1/j1 Single-chip Transceiver
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS2155GT-R.pdf
(238 pages)
- Current page: 208 of 238
- Download datasheet (2Mb)
35.
35.1 T1 Mode
Figure 35-1. Receive-Side D4 Timing
Note 1: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in the multiframe mode (IOCR1.5 = 1).
Note 4: RLINK data (Fs bits) is updated one bit prior to even frames and held for two frames.
Figure 35-2. Receive-Side ESF Timing
Note 1: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in multiframe mode (IOCR1.4 = 1).
Note 4: ZBTSI mode disabled (T1RCR2.2 = 0).
Note 5: RLINK data (FDL bits) is updated one bit time before odd frames and held for two frames.
Note 6: ZBTSI mode is enabled (T1RCR2.2 = 1).
Note 7: RLINK data (Z bits) is updated one bit time before odd frames and held for four frames.
RFSYNC
FRAME#
RFSYNC
RSYNC
RLCLK
RSYNC
TLCLK
FRAME#
RSYNC
RSYNC
RSYNC
RSYNC
RLINK
RLINK
RLCLK
TLINK
FUNCTIONAL TIMING DIAGRAMS
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