upd64a Renesas Electronics Corporation., upd64a Datasheet
upd64a
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SINGLE-CHIP MICROCONTROLLERS FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION The PD64A and 65 feature low-voltage 2.0 V operation, and incorporate a carrier generator for infrared remote control transmission, a standby release function through key entry, and a programmable timer, making ...
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ORDERING INFORMATION Part Number PD64AMC- -5A4 20-pin plastic SSOP (7.62 mm (300)) PD65MC- -5A4 20-pin plastic SSOP (7.62 mm (300)) Remark indicates ROM code suffix. PIN CONFIGURATION (TOP VIEW) 20-Pin Plastic SSOP (7.62 mm (300)) • PD64AMC- -5A4 • PD65MC- ...
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BLOCK DIAGRAM Carrier REM generator 9-bit S /LED 1 timer LIST OF FUNCTIONS Item ROM capacity 1002 Mask ROM RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) I/O pins • Key input (K • Key ...
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PIN FUNCTIONS ............................................................................................................................... 1.1 List of Pin Functions ............................................................................................................................... 1.2 Pin I/O Circuits......................................................................................................................................... 1.3 Recommended Connection of Unused Pins ......................................................................................... 2. INTERNAL CPU FUNCTIONS .......................................................................................................... 2.1 Program Counter (PC) ............................................................................................................................ 2.2 Stack Pointer (SP) ................................................................................................................................... 2.3 Address Stack Register ...
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INSTRUCTION SET .......................................................................................................................... 30 9.1 Machine Language Output by Assembler ............................................................................................. 30 9.2 Circuit Symbol Description .................................................................................................................... 31 9.3 Mnemonic to/from Machine Language (Assembler Output) Contrast Table ..................................... 32 9.4 Accumulator Operation Instructions ..................................................................................................... 36 9.5 I/O Instructions ........................................................................................................................................ ...
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PIN FUNCTIONS 1.1 List of Pin Functions Pin No. Symbol 8-bit I/O port. I/O can be switched in 8-bit units. I/O0 I/ input mode, a pull-down resistor is added ...
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Pin I/O Circuits The I/O circuits of the PD64A and 65 pins are shown in partially simplified forms below. ( I/O0 I/O7 Output Data latch Output disable Input buffer Note The drive capability is held low. ...
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Recommended Connection of Unused Pins The following connections are recommended for unused pins. Table 1-1. Recommended Connection of Unused Pins Pin K Input mode I/O Output mode REM S /LED Caution The ...
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INTERNAL CPU FUNCTIONS 2.1 Program Counter (PC): 11 Bits This is a binary counter that holds the address information of the program memory. Figure 2-1. Program Counter Configuration PC PC10 PC9 PC8 The program counter contains the address of ...
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Program Memory (ROM): 1002 steps 2026 steps The ROM consists of 10 bits per step, and is addressed by the program counter. The program memory stores programs and table data, etc. The 22 steps from 7EAH to 7FFH cannot ...
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Figure 2-4. Data Memory Configuration R (Higher 4 bits ...
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Arithmetic and Logic Unit (ALU): 4 Bits The arithmetic and logic unit (ALU), which is an arithmetic circuit consisting of 4 bits, executes simple manipulations with priority given to logical operations. 2.9 Flags 2.9.1 Status flag (F) Pin and ...
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Carry flag (CY) The carry flag is set (1) in the following cases. • If the ANL instruction or the XRL instruction is executed when bit 3 of the accumulator is “1” and bit 3 of the operand is ...
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PORT REGISTERS (PX) The K port, the K port, the special ports (S I/O I Port register values after reset are shown below. Figure 3-1. Port Register Configuration I/O7 I/O6 I/ ...
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K Port (P0) I/O The K port is an 8-bit I/O port for key scan output. I/O Input/output mode is set by bit 1 of the P4 register read instruction is executed, the pin state can be ...
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K Port/Special Port (P1) I 3.2.1 K port (P : bits P1 The K port is a 4-bit input port for key entry. I The pin state can be read. Use of a ...
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S port (bit 1 of P1) 2 The S port is an input port. 2 Use of a STOP mode release for the S When using this port as a key input from a key matrix, enable the use ...
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Control Register 1 (P4) Control register 1 consists of 8 bits. The contents that can be controlled are as shown below. After reset, the register becomes 0010 0110B. Table 3-6. Control Register 1 (P4) Bit b 7 Name — ...
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TIMER 4.1 Timer Configuration The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists of a 9-bit down counter ( flag ( ...
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Timer Operation The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation instruction. The timer operation instructions for making the timer start operation are shown below. MOV T0, ...
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Carrier Output The carrier for remote-controlled transmission can be output from the REM pin by clearing (0) bit 2 of control register 0. As shown in Figure 4-3, in the case where the timer stops when the carrier is ...
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STANDBY FUNCTION 5.1 Outline of Standby Function To reduce current consumption, two types of standby modes, i.e., HALT mode and STOP mode, are available. In STOP mode, the system clock stops oscillation. At this time, the X In HALT ...
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Standby Mode Setting and Release The standby mode is set with the HALT #b standby mode to be set, the status flag (F) is required to have been cleared (0). The standby mode is released by the release condition ...
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Table 5-3. Standby Mode Setting (HALT #b Operand Value of HALT Instruction Setting Mode STOP STOP Note STOP 1 Any combination ...
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Standby Mode Release Timing (1) STOP mode release timing Figure 5-1. STOP Mode Release by Release Condition HALT instruction Standby release signal Operating mode Oscillation Clock Caution When a release condition is established in the STOP mode, the device ...
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RESET The system is reset by the following occurrences. • When the POC circuit has detected low-power voltage • When the operand value is illegal or does not satisfy the precondition when the HALT instruction is executed • When ...
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POC CIRCUIT The POC circuit monitors the power supply voltage and applies an internal reset in the microcontroller when the battery is replaced. Cautions 1. There are cases in which the POC circuit cannot detect a low power supply ...
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Functions of POC Circuit The POC circuit has the following functions. • Generates an internal reset signal when V • Cancels an internal reset signal when V Here Power supply voltage 3.6 V ...
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SYSTEM CLOCK OSCILLATOR The system clock oscillator is configured by an oscillator circuit for a ceramic resonator (f Ceramic resonator The system clock oscillator stops its oscillation after reset or in STOP mode. Caution When using the system clock ...
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INSTRUCTION SET 9.1 Machine Language Output by Assembler The bit length of the machine language of this product is 10 bits per word. However, the machine language output by the assembler is extended to 16 bits per word. As ...
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Circuit Symbol Description A: Accumulator ASR: Address stack register addr: Program memory address CY: Carry flag data4: 4-bit immediate data data8: 8-bit immediate data data10: 10-bit immediate data F: Status flag PC: Program counter Pn: Port register pair (n ...
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Mnemonic to/from Machine Language (Assembler Output) Contrast Table Accumulator operation instructions Instruction Code Mnemonic Operand 1st Word 2nd Word ANL A, R0n FBEn A, R1n FAEn A, @R0H FAF0 A, @R0L FBF0 A, #data4 FBF1 data4 ORL A, R0n ...
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Input/output instructions Instruction Code Mnemonic Operand 1st Word 2nd Word IN A, P0n FFF8 + n — A, P1n FEF8 + n — OUT P0n, A E5F8 + n — P1n, A E4F8 + n — ANL A, P0n FBF8 ...
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Branch instructions Instruction Code Mnemonic Operand 1st Word 2nd Word JMP addr (Page 0) E8F1 addr addr (Page 1) E9F1 addr JC addr (Page 0) ECF1 addr addr (Page 1) EAF1 addr JNC addr (Page 0) EDF1 addr addr (Page ...
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Other instructions Instruction Code Mnemonic Operand 1st Word 2nd Word HALT #data4 E2F1 data4 STTS #data4 E3F1 data4 R0n E3En SCAF FAF3 NOP E0E0 Operation 3rd Word Standby mode If statuses match F 1 else statuses match ...
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Accumulator Operation Instructions ANL A, R0n ANL A, R1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) CY The accumulator contents and the register Rmn contents are ANDed and the results are ...
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ORL A, R0n ORL A, R1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) ( The accumulator contents and the register Rmn contents are ORed and the results are entered in ...
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XRL A, @R0H XRL A, @R0L <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) CY (A) CY The accumulator contents and the program memory contents specified with the ...
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I/O Instructions IN A, P0n IN A, P1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) (Pmn The port Pmn ...
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OUT Pn, #data8 <1> Instruction code <2> Cycle count: 1 <3> Function: (Pn) The immediate data is transferred to port Pn. In this case, port Pn refers ...
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MOV R0n, A MOV R1n, A <1> Instruction code <2> Cycle count: 1 <3> Function: (Rmn) The accumulator contents are transferred to register Rmn. MOV Rn, #data8 <1> Instruction code ...
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Branch Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD64A ...
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Subroutine Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD64A ...
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Timer Operation Instructions MOV A, T0 MOV A, T1 <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) CY The timer Tn contents are transferred to the accumulator. ...
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MOV T, @R0 <1> Instruction code <2> Cycle count: 1 <3> Function: (T) ((P13), (R0)) The program memory contents specified by the control register P13 and the register pair R ...
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STTS #data4 <1> Instruction code <2> Cycle count: 1 <3> Function: If statuses match F else F The ...
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ASSEMBLER RESERVED WORDS 10.1 Mask Option Quasi Directives When creating the PD64A and 65 program necessary to use a mask option quasi directive in the assembler’s source program. 10.1.1 OPTION and ENDOP quasi directives The OPTION and ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Power supply voltage V DD Input voltage I/O Output voltage V O Note Output current, high I REM OH LED Per K Total of ...
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DC Characteristics (T = – Parameter Symbol Input voltage, high V S IH1 IH2 I IH3 I Input voltage, low V S IL1 IL2 I/O ...
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AC Characteristics (T = – Parameter Symbol Instruction execution time high-level width When standby mode is released Note 10 + ...
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Recommended Ceramic Resonator (T Manufacturer Part Number TDK Corp. FCR3.52MC5 FCR3.58MC5 FCR3.64MC5 FCR3.84MC5 FCR4.0MC5 FCR6.0MC5 FCR8.0MC5 Murata Mfg. Co., Ltd CSA2.50MG040 CST2.50MG040 CSA3.52MG CST3.52MGW CSTS0352MG03 CSA3.58MG CST3.58MGW CST0358MG03 CSA3.64MG CST3.64MGW CSTS0364MG03 CSA3.84MG CST3.84MGW CST0384MG03 CSA4.00MG CST4.00MGW CSTS0400MG03 CSA6.00MG CST6.00MGW CSTS0600MG03 ...
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CHARACTERISTIC CURVES (REFERENCE VALUES MHz 0.9 0.8 0.7 0.6 Operating mode 0.5 0.4 0.3 0.2 0.1 0 1.5 2 2.5 3 Power supply voltage V I vs. V (REM, ...
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APPLICATION CIRCUIT EXAMPLE Example of application to system · Remote-control transmitter (48 keys; mode selection switch accommodated) K I/ /LED 1 REM OUT X IN GND Note S 2 Mode ...
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PACKAGE DRAWING 20-PIN PLASTIC SSOP (7.62 mm (300 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The external dimensions and ...
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RECOMMENDED SOLDERING CONDITIONS The PD64A and 65 should be soldered and mounted under the following recommended conditions. For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and ...
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APPENDIX A. DEVELOPMENT TOOLS Emulators are provided for the PD64A and 65 emulation tools. Hardware Note • Emulators (EB-65, EB-69 ) These are tools used to emulate the PD64A and 65. Note Products of Naito Densei Machida Mfg. Co., Ltd. ...
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APPENDIX B. FUNCTIONAL COMPARISON BETWEEN PD64A, 65 AND OTHER PRODUCTS Item PD62 ROM capacity 512 10 bits RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) Key matrix keys Key extended input ...
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APPENDIX C. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT (in the case of NEC transmission format in one-shot command transmission mode) Caution When using the NEC transmission format, please apply for a custom code at NEC. (1) REM output waveform (from <2> ...
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Carrier waveform (enlarged waveform of each code’s high period) REM output 8.77 s (6) Bit array of each code Leader code Custom code Caution To prevent ...
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Data Sheet U14380EJ3V0DS00 PD64A, 65 ...
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Data Sheet U14380EJ3V0DS00 PD64A ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...
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MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/AT and PC DOS are trademarks of International Business Machines Corporation. The export of this product from Japan is regulated by ...