upd17240 Renesas Electronics Corporation., upd17240 Datasheet

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PD17240,17241,17242,17243,17244,17245,17246 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTERS DESCRIPTION The µ PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (hereafter called the µ PD17246 Subseries) are 4- bit single-chip microcontrollers for small general-purpose infrared remote control transmitters. ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 APPLICATIONS Preset remote controllers, toys, portable systems, etc. ORDERING INFORMATION Part Number µ PD17240MC-×××-5A4 30-pin plastic SSOP (7.62 mm (300)) µ PD17241MC-×××-5A4 30-pin plastic SSOP (7.62 mm (300)) µ PD17242MC-×××-5A4 30-pin plastic ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 DIFFERENCES BETWEEN µ PD17246 SUBSERIES, µ PD17236 SUBSERIES, AND µ PD17255 SUBSERIES (1/2) µ PD17246 Subseries Item µ PD17240: 2,048 × 16 bits ROM µ PD17241: 4,096 × 16 bits µ PD17242: ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 DIFFERENCES BETWEEN µ PD17246 SUBSERIES, µ PD17236 SUBSERIES, AND µ PD17255 SUBSERIES (2/2) µ PD17246 Subseries Item STOP mode release <1> When any of pins P0A condition to P0A 3 <2> When ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 PIN CONFIGURATION (TOP VIEW) • 30-pin plastic SSOP (7.62 mm (300)) P0D 2 P0D 3 P1B /INT 0 P0E 0 P0E 1 P0E 2 P0E 3 REM OUT X ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 BLOCK DIAGRAM P0A 0 P0A 1 P0A P0A 2 P0A 3 P0B 0 P0B 1 P0B P0B 2 P0B 3 P0C 0 P0C 1 P0C P0C 2 P0C 3 µ PD17240: 2,048 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1. PIN FUNCTIONS .......................................................................................................................... 1.1 Pin Function List ............................................................................................................... 1.2 I/O Circuits ......................................................................................................................... 1.3 Handling of Unused Pins ................................................................................................. 2. MEMORY SPACE ......................................................................................................................... 2.1 Program Counter (PC) ...................................................................................................... 2.2 Program Memory (ROM) ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8. INTERRUPT FUNCTIONS ........................................................................................................... 8.1 Interrupt Sources .............................................................................................................. 8.2 Hardware of Interrupt Controller .................................................................................... 8.3 Interrupt Sequence ........................................................................................................... 9. STANDBY FUNCTIONS ............................................................................................................... 9.1 HALT Mode ......................................................................................................................... 9.2 HALT Instruction Execution Conditions ........................................................................ ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1. PIN FUNCTIONS 1.1 Pin Function List (1/3) Pin No. Pin Name 28 P0D These pins constitute a 4-bit I/O port which can be set to the input 0 29 P0D or ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1.1 Pin Function List (2/3) Pin No. Pin Name 4 P0E These pins constitute a 4-bit I/O port that can be set to the input or When key 0 5 P0E output ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1.1 Pin Function List (3/3) Pin No. Pin Name 14 P1A These pins constitute a 3-bit I/O port that can be set to the input or When key 0 15 P1A output ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1.2 I/O Circuits The equivalent I/O circuit for each µ PD17246 pin is shown below. (1) P0A V DD Input buffer (2) P0B, P0C, P0D Output Data latch Output disable Selector Input ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (6) RESET Reset input Input buffer Schmitt trigger input with hysteresis characteristics (7) INT Input buffer Schmitt trigger input with hysteresis characteristics Figure 1-1. I/O Circuits (2/2) (8) REM V DD Data ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1.3 Handling of Unused Pins Handle the unused pins as follows. Table 1-1. Handling of Unused Pins Pin Name P0A to P0A 0 3 P0B to P0B 0 3 P0C to P0C ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2. MEMORY SPACE 2.1 Program Counter (PC) The program counter (PC) specifies an address of the program memory (ROM). The program counter consists of an 11/12/13-bit binary counter and a 1-bit segment ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 The first address of the subroutine that can be called by the system call instruction (“SYSCAL entry”) is the first 16 steps of each block (blocks page 0 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Figure 2-3. Value of Program Counter on Execution of Each Instruction Program Counter Instruction SGR addr Page 0 0 Page 1 0 Re- tained Page 2 1 Page 3 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.2 Program Memory (ROM) The configuration of the program memory is as follows. Part Number µ PD17240 2,048 × 16 bits µ PD17241 4,096 × 16 bits µ PD17242 6,144 × 16 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Address Reset start address Normal address Basic interval timer interrupt vector INT ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.3 Stack A stack is a register used to save a program return address and the contents of system registers (to be described later) when a subroutine is called or when an ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.3.2 Function of stack The address stack register stores a return address when the subroutine call instruction or table reference instruction (first instruction cycle) is executed or when an interrupt is acknowledged. ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.4 Data Memory (RAM) The data memory (RAM) stores data for operations and control. It can always be read/written by instructions. 2.4.1 Memory configuration Figure 2-6 shows the configuration of the data ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (5) General-purpose data memory The general-purpose data memory area is an area of the data memory excluding the system register area, and the port register area. This memory area has a total ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Figure 2-6. Configuration of Data Memory (2/2) Column address Column address ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.4.2 System registers (SYSREG) The system registers are registers that are directly related to control of the CPU. These registers are mapped to addresses 74H to 7FH on the data memory and ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.4.3 General register (GR) A general register is a register on the data memory and used for arithmetic operations and transfer of data to and from the data memory. (1) Configuration of ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Figure 2-8. Configuration of General Registers General register pointer (RP) RPH RPL BANK0 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.4.4 Data buffer (DBF) The data buffer on addresses 0CH to 0FH of the data memory is used for data transfer to and from peripheral hardware and for storage of data during ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Table 2-4. Relationship Between Peripheral Hardware and Data Buffer Peripheral Hardware Name 8-bit timer 8-bit counter 8-bit modulo register Remote controller NRZ low-level carrier generator timer modulo register NRZ high-level timer modulo ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (3) Notes on using data buffer When transferring data to/from the peripheral hardware via the data buffer, the unused peripheral addresses, write-only peripheral registers (only when executing PUT), and read-only peripheral registers ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.5 Register File (RF) The register file mainly consists of registers that set the conditions of the peripheral hardware. These registers can be controlled by the dedicated instructions PEEK and POKE, and ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 2.5.2 Control registers The control registers consist of a total of 64 nibbles (64 × 4 bits) of addresses 00H to 3FH of the register file. Of these, however, only 24 nibbles ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (2) Symbol definition of register file An error occurs if a register file address is directly specified as a numeral by the operand “rf” of the “PEEK WR, rf” or “POKE rf, ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3. PORTS 3.1 Port 0A (P0A to P0A ) 0 3 This is a 4-bit input port. Data is read using port register P0A (address 70H of BANK0). This port is a ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.5 Port 0E (P0E to P0E ) 0 3 This is a 4-bit I/O port. The input mode or output mode and whether a key matrix is used or not can be ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.7 Port 1B (P1B ) 0 The P1B pin functions alternately as the INT pin. To use the P1B 0 register file to 0. The P1B pin functions as a 1-bit CMOS ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.8 INT Pin The INT pin functions alternately as the P1B register file to 1. This pin inputs an external interrupt request signal. The IRQ flag (RF: bit 0 of address 3EH) ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.9 Switching Bit I/O (Port 0B, 0E, 1A) An I/O that can be set to the input or output mode in bit units is called a bit I/O. P0B, P0E, and P1A ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 P0EBIO3 P0EBIO2 P0EBIO1 P0EBIO0 P1ABIO2 P1ABIO1 P1ABIO0 Data Sheet U15002EJ1V1DS Address After reset R/W 0H R/W RF: 27H P0EBIO0 Sets P0E input/output mode ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.10 Selecting I/O Mode of Group I/O (Port 0C, 0D) An I/O that is set to the input or output mode in 4-bit units is called a group I/O. P0C and P0D ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.11 Selecting Whether Key Matrix Is Used or Not (Port 0E, 1A) By using the following register file, whether P0E and P1A are used for a key matrix can be selected in ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.12 Specifying Resistor Connection (Port 0E, 1A) (1) Port key matrix is not used, whether or not a pull-up resistor is connected to port P0E can be specified in ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (2) Port 1A Whether a resistor is connected to each bit of port P1A when a key matrix is not used can be specified in 1- bit units by using the following ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.13 Selecting Standby Mode Release Condition and Whether Pull-Up or Pull-Down Resistor Is Connected (Port 1A) The standby mode release condition and whether a pull-up or pull-down resistor specified in 1-bit units ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (2) When key matrix is not used (P1AKEYn = P1AHL2 P1AHL1 P1AHL0 Caution The standby mode is not released by P1A when a key matrix is ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 3.14 Selecting Whether Key Matrix Is Used, Standby Mode Release Condition, and Whether Pull-Up or Pull-Down Resistor Is Connected (Port 1B) Whether a key matrix is used or not, whether a resistor ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 4. CLOCK GENERATOR 4.1 Instruction Execution Time (CPU Clock) Selection The µ PD17246 is equipped with a clock oscillator that supplies clocks to the CPU and peripheral hardware. Instruction execution time can ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 5. 8-BIT TIMER AND REMOTE CONTROLLER CARRIER GENERATOR The µ PD17246 is equipped with an 8-bit timer, which is mainly used to generate the leader pulse of the remote controller signal and ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Figure 5-1. Configuration of 8-Bit Timer and Remote Controller Carrier Generator TMEN /256 8-bit counter ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 5.2 Function of 8-Bit Timer (with Modulo Function TMEN TMRES TMCK1 TMCK0 Notes 1. When the STOP mode is released, bit 3 must be set. 2. Bit 2 is ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 5.3 Carrier Generator for Remote Controller µ PD17246 is provided with a carrier generator for the remote controller. The remote controller carrier generator consists of an 8-bit counter, NRZ high-level timer modulo ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 5.3.1 Remote controller signal output control The REM pin, which outputs the carrier, is controlled by bits NRZ and NRZBF of the register file and timer 0. While the NRZ contents are ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 When REMEN (address 12H, bit 1) of register file is 1 (carrier not output) NRZ REM REMEN NRZ NRZBF ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Setting carrier frequency and duty factor Where the system clock frequency is f • When /2: (division ratio • When (division ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (2) Where MHz (original oscillation µ s) Set Value t H NRZHTMM NRZLTMM 00H 00H 0.25 01H 02H 0.5 04H 04H 1.25 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 5.3.2 Countermeasures against noise during transmission (carrier output) When a signal is transmitted from the transmitter of a remote controller, a peak current of 0 may flow through the ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 6. BASIC INTERVAL TIMER/WATCHDOG TIMER The basic interval timer has a function to generate the interval timer interrupt signal and watchdog timer reset signal. 6.1 Source Clock for Basic Interval Timer The ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 WDTRES BTMCK BTMRES Note Bits 1 and 3 are write-only bits Address After reset R/W Note 0 RF: 03H 0H R/W BTMRES Basic interval timer reset 0 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 6.3 Operation Timing for Watchdog Timer The basic interval timer can be used as a watchdog timer. Unless the watchdog timer is reset within a fixed time µ PD17246 is reset. It ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 7. RAM RETENTION DETECTOR 7.1 RAM Retention Flag The RAM retention flag (bit 0 of the register file at address 21H) indicates whether the supply voltage has dropped below the level at ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 RAMFLAG Note RAMFLAG is “0” when V is about 1 less, and “undefined” when V DD Address After reset R/W Note RF: 21H ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8. INTERRUPT FUNCTIONS 8.1 Interrupt Sources µ PD17246 is provided with three interrupt sources. When an interrupt has been acknowledged, the program execution automatically branches to a predetermined address, which is called ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8.2 Hardware of Interrupt Controller This section describes the flags of the interrupt controller. (1) Interrupt request flag and interrupt enable flag The interrupt request flag (IRQ×××) is set to 1 when ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8.2.2 IEG This pin selects the interrupt edge to be detected on the INT pin. When this flag is 0, the interrupt is detected at the rising edge; when ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8.2.5 IRQ This is an interrupt request flag that indicates the interrupt request status. When an interrupt request is generated, this flag is set to 1. When the interrupt has been acknowledged, ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8.3 Interrupt Sequence If the IRQ×× flag is set to 1 when the IP×× flag is “1”, interrupt processing is started after the instruction cycle of the instruction executed when the IRQ×× ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 8.3.2 Returning from interrupt processing routine To return from an interrupt processing routine, use the RETI instruction. The following processing is then executed within an instruction cycle. To enable an interrupt after ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 9. STANDBY FUNCTIONS The µ PD17246 is provided with HALT and STOP modes as standby functions. By using the standby function, current consumption can be reduced. In the HALT mode, the program ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Table 9-2. Operations After HALT Mode Release (a) HALT 08H HALT Mode Released by: Interrupt Status When release condition of P0A Don’t care 0 to P0A , P0B to P0B , P0C ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 9.3 STOP Mode In the STOP mode, the system clock (f current consumption. To set the STOP mode, use the STOP instruction. The STOP mode release condition can be specified by the ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 9.4 STOP Instruction Execution Conditions The STOP instruction can be executed under special conditions, as shown in Table 9-5, to prevent the program from hanging up. If the conditions in Table 9-5 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 9.5 Releasing Standby Mode The operations for releasing the STOP and HALT modes are as shown in Figure 9-1. Figure 9-1. Operations After Standby Mode Release (a) Releasing STOP mode by interrupt ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 10. RESET 10.1 Reset by Reset Signal Input When a low-level signal of more than 10 µ input to the RESET pin, the µ PD17246 is reset. When the system ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 10.3 Reset by Stack Pointer (with RESET Pin Internally Pulled Down) When the value of the stack pointer reaches during program execution, the RESET pin is internally pulled down, ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 11. LOW-VOLTAGE DETECTOR (WITH RESET PIN INTERNALLY PULLED DOWN) The RESET pin is internally pulled down for initialization (reset) to prevent program hang-up that may take place when the batteries are replaced, ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 12. ASSEMBLER RESERVED WORDS 12.1 Mask Option Directives When developing the µ PD17246 program, mask options must be specified by using mask option directives in the program. To select the low-voltage detector ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Table 12-1. Mask Option Definition Directives Name Directive Operands 1st Operand CAP OPTCAP 1 USECAP (capacitor for oscillation provided) NOUSECAP (capacitor for oscillation not provided) POC OPTPOC 1 USEPOC (low-voltage detector provided) ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Table 12-2. Reserved Symbols (1/3) Symbol Name Attribute Value DBF3 MEM 0.0CH DBF2 MEM 0.0DH DBF1 MEM 0.0EH DBF0 MEM 0.0FH AR3 MEM 0.74H AR2 MEM 0.75H AR1 MEM 0.76H AR0 MEM ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Table 12-2. Reserved Symbols (2/3) Symbol Name Attribute Value P0E0 FLG 0.6FH.0 P0E1 FLG 0.6FH.1 P0E2 FLG 0.6FH.2 P0E3 FLG 0.6FH.3 P1A0 FLG 1.70H.0 P1A1 FLG 1.70H.1 P1A2 FLG 1.70H.2 P1B0 FLG ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Table 12-2. Reserved Symbols (3/3) Symbol Name Attribute Value IEG FLG 0.9FH.0 RAMFLAG FLG 0.0A1H.0 P1ABIO0 FLG 0.0A5H.0 P1ABIO1 FLG 0.0A5H.1 P1ABIO2 FLG 0.0A5H.2 P0BBIO0 FLG 0.0A6H.0 P0BBIO1 FLG 0.0A6H.1 P0BBIO2 FLG ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Figure 12-1. Register Files (1/2) Column 0 1 Address Row Address Bit Bit Bit 1 Bit Bit 3 0 Bit 2 0 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Column 8 9 Address Row Address Bit 3 Bit 2 0 Bit 1 Bit 0 Bit 3 Bit 2 1 Bit 1 Bit 0 Bit 3 Bit 2 2 Bit 1 Bit ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 13. INSTRUCTION SET 13.1 Instruction Set Outline BIN. HEX ADD SUB ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 13.2 Legend AR: Address register ASR: Address stack register specified by stack pointer addr: Program memory address (lower 11 bits) BANK: Bank register CMP: Compare flag CY: Carry flag DBF: Data buffer ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 13.3 List of Instructions Group Mnemonic Operand (r) ← (r) + (m) Add ADD r, m (m) ← ( #n4 (r) ← ( ADDC r, ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Group Mnemonic Operand SP ← SP – 1, ASR ← AR Transfer PUSH AR AR ← ASR, SP ← POP AR WR ← (rf) PEEK WR, rf (rf) ← ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (d) µ PD17243, 17244, 17245, 17246 Operand ← addr, Page ← 0 addr PC 10–0 ← addr, Page ← 10–0 ← addr, Page ← 10–0 ← addr, Page ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 14. ELECTRICAL SPECIFICATIONS ° Absolute Maximum Ratings ( Item Symbol Supply voltage V DD Input voltage V I Output voltage V O Note Output current, high I OH ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Recommended Operating Ranges (T Item Symbol Supply Voltage V DD1 V DD2 V DD3 V DD4 Oscillation frequency f X Operating temperature T A Note Low-voltage detector t CY (Mask option) Note ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 System Clock Oscillator Characteristics (T Resonator Recommended Constants Ceramic resonator OUT Notes 1. The oscillation frequency only indicates the oscillator characteristics. 2. The oscillation stabilization time is necessary for ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Recommended Oscillator Constant ° Ceramic resonator (T = – Manufacturer Part Number Murata Mfg. Co., Ltd. CSBLA1M00J58-B0 CSBFB1M00J58-R1 CSTLS2M00G56-B0 CSTCC2M00G56-R0 CSTLS3M00G56-B0 CSTCC3M00G56-R0 CSTLS4M00G56-B0 CSTCR4M00G55-R0 CSTLS6M00G56-B0 CSTCR6M00G55-R0 CSTLS8M00G56-B0 CSTCC8M00G56-R0 ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 ° DC Characteristics (T = – Item Symbol Input voltage, high V RESET, INT IHI1 V P0A, P0B, P0C, P0D IH2 V P0E, P1A, P1B IH3 Input ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 ° AC Characteristics (T = – Item Symbol Note CPU clock cycle time 2.0 to 3.6 V CY1 DD (Instruction execution time ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 15. APPLICATION CIRCUIT EXAMPLE P0D P0D P1B 0 P0E + P0E P0E P0E REM MHz GND RESET P1A Jog P1A shuttle = 94 P1A ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 16. PACKAGE DRAWING 30-PIN PLASTIC SSOP (7.62 mm (300 NOTE Each lead centerline is located within 0. its true position (T.P.) ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 17. RECOMMENDED SOLDERING CONDITIONS The µ PD17240, 17241, 17242, 17243, 17244, 17245, and 17246 should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 DIFFERENCES BETWEEN µ PD17246 AND µ PD17P246 APPENDIX A The µ PD17P246 is equipped with PROM to which data can be written by the user instead of the internal mask ROM (program ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 APPENDIX B DEVELOPMENT TOOLS The following development tools are available to develop the programs for the µ PD17246 Subseries. Hardware Name The IE-17K and IE-17K-ET are in-circuit emulators used in common with ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Software Name Outline 17K assembler The RA17K is an assembler (RA17K) common to 17K Series products. When developing the programs of devices, RA17K is used in combination with a device file (AS17225). ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country ...

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PD17240, 17241, 17242, 17243, 17244, 17245, 17246 SIMPLEHOST is a trademark of NEC Electronics Corporation. Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/ trademark of ...