upd17240 Renesas Electronics Corporation., upd17240 Datasheet - Page 22

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upd17240

Manufacturer Part Number
upd17240
Description
4-bit Single-chip Microcontrollers For Small General-purpose Infrared Remote Control Transmitters
Manufacturer
Renesas Electronics Corporation.
Datasheet

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2.4
2.4.1
and the lower 4 bits of the address indicate a “column address”. For example, a data memory location indicated by
row address 1H and column address 0AH is termed a data memory location at address 1AH. Each address stores
data of 4 bits (= 1 nibble).
22
(1) System register (SYSREG)
(2) Data buffer (DBF)
(3) General register (GR)
(4) Port register
The data memory (RAM) stores data for operations and control. It can always be read/written by instructions.
Figure 2-6 shows the configuration of the data memory (RAM).
The data memory consists of four “banks”: BANK0, BANK1, BANK2, and BANK3.
In each bank, every 4 bits of data are assigned an address. The higher 3 bits of the address indicate a “row address”
In addition, the data memory is divided into the following six functional blocks.
Data Memory (RAM)
A system register (SYSREG) is resident on addresses 74H to 7FH (12 nibbles) of each bank. In other words,
each bank has the same system register at its addresses 74H to 7FH.
A data buffer is resident on addresses 0CH to 0FH (4 nibbles) of bank 0 of the data memory.
The reset value is 0320H.
A general register is resident on any row (16 nibbles) of any bank of the data memory.
The row address of the general register is pointed to by the general register pointer (RP) in the system register
(SYSREG).
A port data register is resident on addresses 6FH, and 70H to 73H of BANK0 and addresses 70H and 71H
of BANK1 (7 nibbles) of the data memory.
No data can be written to or read from addresses 72H and 73H of BANK1 and addresses 70H to 73H of BANK2
or BANK3.
Memory configuration
µ PD17240, 17241, 17242, 17243, 17244, 17245, 17246
Data Sheet U15002EJ1V1DS

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