74AHCT74PW,112 NXP Semiconductors, 74AHCT74PW,112 Datasheet - Page 9

• Manufacturer Part Number: 74AHCT74PW,112
• Description: IC DUAL D F-F POS-EDG 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr
• Type: D-Typer

Specifications of 74AHCT74PW,112

• Function: Set(Preset) and Reset
• Output Type: Differential
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 140MHz
• Delay Time - Propagation: 4.8ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Logic Family: AHCT
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Polarity: Invert/Non-Invert
• Operating Supply Voltage (typ): 5V
• Package Type: TSSOP
• Propagation Delay Time: 14.5ns
• Low Level Output Current: 8mA
• High Level Output Current: -8mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74AHCT74PW; 74AHCT74PW; 935263077112

NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
74AHC_AHCT74_5
Product data sheet
Symbol Parameter
C
74AHCT74; V
t
f
t
t
t
t
C
pd
max
W
su
h
rec
PD
PD
Typical values are measured at nominal supply voltage (V
t
C
P
f
f
C
V
N = number of inputs switching;
pd
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
power
dissipation
capacitance
propagation
delay
maximum
frequency
pulse width
set-up time
hold time
recovery
time
power
dissipation
capacitance
PD
V
Dynamic characteristics
CC
2
CC
V
CC
f
= 4.5 V to 5.5 V
o
2
) = sum of the outputs.
PLH
f
i
Conditions
f
nCP to nQ, nQ; see
nSD, nRD to nQ, nQ;
see
see
CP HIGH or LOW;
nSD, nRD LOW;
see
nD to nCP; see
nD to nCP; see
nRD to nCP; see
f
N + (C
and t
i
i
= 1 MHz; V
= 1 MHz; V
C
C
C
C
C
C
L
L
L
L
L
L
Figure 7
Figure 7
Figure 7
PHL
= 15 pF
= 50 pF
= 15 pF
= 50 pF
= 15 pF
= 50 pF
L
.
V
CC
I
I
and
= GND to V
= GND to V
2
…continued
Figure 7
Figure 7
f
8
Figure 8
o
) where:
Figure 7
CC
CC
Rev. 05 — 9 June 2008
Dual D-type flip-flop with set and reset; positive-edge trigger
CC
[3]
[2]
[3]
D
in W).
= 3.3 V and V
Min Typ
100
5.0
5.0
3.5
80
0
-
-
-
-
-
-
25 C
Figure
160
140
3.3
4.8
3.7
5.3
12
16
-
-
-
-
[1]
CC
= 5.0 V).
Max
10.4
11.4
9.
74AHC74; 74AHCT74
7.8
8.8
-
-
-
-
-
-
-
-
40 C to +85 C
Min
1.0
1.0
1.0
1.0
5.0
5.0
3.5
80
65
0
-
-
Max
10.0
12.0
13.0
9.0
-
-
-
-
-
-
-
-
40 C to +125 C Unit
Min
1.0
1.0
1.0
1.0
5.0
5.0
3.5
80
65
0
-
-
© NXP B.V. 2008. All rights reserved.
Max
10.0
11.0
13.0
14.5
-
-
-
-
-
-
-
-
9 of 18
pF
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
pF