74HC173D,653 NXP Semiconductors, 74HC173D,653 Datasheet - Page 9
![IC QUAD D F-F POS-EDGE 16SOIC](/photos/6/52/65286/16-soic_sot109-1_sml.jpg)
74HC173D,653
Manufacturer Part Number
74HC173D,653
Description
IC QUAD D F-F POS-EDGE 16SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Type
D-Type Busr
Datasheet
1.74HCT173DB112.pdf
(10 pages)
Specifications of 74HC173D,653
Output Type
Tri-State Non Inverted
Package / Case
16-SOIC (3.9mm Width)
Function
Master Reset
Number Of Elements
1
Number Of Bits Per Element
4
Frequency - Clock
95MHz
Delay Time - Propagation
16ns
Trigger Type
Positive Edge
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
HC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
17 ns at 5 V
High Level Output Current
- 7.8 mA
Low Level Output Current
7.8 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Technology
CMOS
Number Of Bits
4
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
5V
Package Type
SO
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4558-2
74HC173D-T
74HC173D-T
933714560653
74HC173D-T
74HC173D-T
933714560653
Philips Semiconductors
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
December 1990
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
f
PHL
PHL
PZH
PHZ
THL
W
W
rem
su
su
h
h
max
Quad D-type flip-flop; positive-edge trigger; 3-state
/ t
/ t
/ t
/ t
TLH
PLH
PZL
PLZ
propagation delay
propagation delay
3-state output enable time
3-state output disable time
output transition time
clock pulse width
master reset pulse
removal time
set-up time
set-up time
hold time
hold time
maximum clock pulse
r
= t
CP to Q
MR to Q
OE
OE
HIGH or LOW
width; HIGH
MR to CP
E
D
E
D
frequency
n
n
n
n
f
to CP
to CP
n
n
to CP
to CP
= 6 ns; C
PARAMETER
to Q
to Q
n
n
n
n
L
= 50 pF
16
15
12
22
12
0
0
30
min. typ. max. min. max. min. max.
20
20
20
19
5
7
6
13
7
80
2
6
3
25
40
37
35
30
12
9
T
74HCT
amb
20
19
15
28
15
0
0
24
40 to 85
( C)
50
46
44
38
15
24
22
18
33
18
0
0
20
40 to 125
60
56
53
45
19
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
UNIT
74HC/HCT173
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
V
(V)
TEST CONDITIONS
CC
Product specification
Fig.6
Fig.7
Fig.8
Fig.8
Fig.6
Fig.6
Fig.7
Fig.7
Fig.9
Fig.9
Fig.9
Fig.9
Fig.6
WAVEFORMS