74HC173PW,118 NXP Semiconductors, 74HC173PW,118 Datasheet - Page 4

• Manufacturer Part Number: 74HC173PW,118
• Description: IC QUAD D F-F POS-EDGE 16TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: D-Type Busr

Specifications of 74HC173PW,118

• Output Type: Tri-State Non Inverted
• Package / Case: 16-TSSOP
• Function: Master Reset
• Number Of Elements: 1
• Number Of Bits Per Element: 4
• Frequency - Clock: 95MHz
• Delay Time - Propagation: 16ns
• Trigger Type: Positive Edge
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: HC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 17 ns at 5 V
• High Level Output Current: - 7.8 mA
• Low Level Output Current: 7.8 mA
• Supply Voltage (max): 6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 2 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74HC173PW-T; 74HC173PW-T; 935189550118

Philips Semiconductors
FUNCTION TABLE
Notes
1. H = HIGH voltage level
December 1990
reset (clear)
parallel load
hold (no change)
read
disabled
Quad D-type flip-flop; positive-edge trigger; 3-state
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition
q = lower case letters indicate the state of the referenced input (or output)
X = don’t care
Z = high impedance OFF-state
= LOW-to-HIGH CP transition
one set-up time prior to the LOW-to-HIGH CP transition
3-STATE BUFFER OPERATING MODES
REGISTER OPERATING MODES
Fig.4 Functional diagram.
4
H
L
L
L
L
MR
Q
n
(register)
X
X
X
CP
H
X
X
L
INPUTS
INPUTS
X
l
l
h
X
E
1
L
L
H
X
OE
X
l
l
X
h
E
2
1
L
L
X
H
OE
X
l
h
X
X
D
n
2
74HC/HCT173
L
H
Z
Z
Q
Product specification
0
Q
OUTPUTS
OUTPUTS
L
H
Z
Z
n
Q
(register)
1
q
q
H
L
L
n
n
L
H
Z
Z
Q
2
L
H
Z
Z
Q
3